JPS56157037A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS56157037A
JPS56157037A JP5994780A JP5994780A JPS56157037A JP S56157037 A JPS56157037 A JP S56157037A JP 5994780 A JP5994780 A JP 5994780A JP 5994780 A JP5994780 A JP 5994780A JP S56157037 A JPS56157037 A JP S56157037A
Authority
JP
Japan
Prior art keywords
silicon nitride
nitride film
crack
impurity
nitrogen
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5994780A
Other languages
Japanese (ja)
Inventor
Takahiko Moriya
Masahiro Kashiwagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP5994780A priority Critical patent/JPS56157037A/en
Publication of JPS56157037A publication Critical patent/JPS56157037A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To enhance the crack withstanding property, the water resisting property and the impurity withstanding property of the semiconductor device having a protective film of silicon nitride by a method wherein the composition of the silicon nitride film is made to have the prescribed ratio and density of silicon, nitrogen and hydrogen. CONSTITUTION:The silicon nitride film is formed and is made to cover the surface of the semiconductor element by the plasma CVD method using SiH4, NH3 and N2 gas. This silicon nitride film is made to have the thickness within the range of 0.8-2.0mum, to have the N/Si atom ratio of 1.1-1.25 and to have density of 2.6- 2.8g/cm<2>. After then it is heat-treated at 400-500 deg.C in the mixed gas of hydrogen and nitrogen. Accordingly the generation of a crack in the silicon nitride film is prevented, corrosion and short-circuiting of Al wiring to be caused by an invasion of water or impurity is prevented and the integrated circuit having a high quality is obtained.
JP5994780A 1980-05-08 1980-05-08 Semiconductor device Pending JPS56157037A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5994780A JPS56157037A (en) 1980-05-08 1980-05-08 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5994780A JPS56157037A (en) 1980-05-08 1980-05-08 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS56157037A true JPS56157037A (en) 1981-12-04

Family

ID=13127842

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5994780A Pending JPS56157037A (en) 1980-05-08 1980-05-08 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS56157037A (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60160634A (en) * 1984-01-31 1985-08-22 Fujitsu Ltd Semiconductor device
JPS63132433A (en) * 1986-11-21 1988-06-04 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
US8268722B2 (en) 2009-06-03 2012-09-18 Novellus Systems, Inc. Interfacial capping layers for interconnects
US8317923B1 (en) 2004-11-03 2012-11-27 Novellus Systems, Inc. Protective self-aligned buffer layers for damascene interconnects
WO2013054823A1 (en) * 2011-10-14 2013-04-18 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US8430992B1 (en) 2004-11-03 2013-04-30 Novellus Systems, Inc. Protective self-aligned buffer layers for damascene interconnects
US8753978B2 (en) 2011-06-03 2014-06-17 Novellus Systems, Inc. Metal and silicon containing capping layers for interconnects
US8858763B1 (en) 2006-11-10 2014-10-14 Novellus Systems, Inc. Apparatus and methods for deposition and/or etch selectivity
US9099535B1 (en) 2001-03-13 2015-08-04 Novellus Systems, Inc. Method of depositing a diffusion barrier for copper interconnect applications
US9117884B1 (en) 2003-04-11 2015-08-25 Novellus Systems, Inc. Conformal films on semiconductor substrates
US9633896B1 (en) 2015-10-09 2017-04-25 Lam Research Corporation Methods for formation of low-k aluminum-containing etch stop films

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5519850A (en) * 1978-07-31 1980-02-12 Hitachi Ltd Semiconductor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5519850A (en) * 1978-07-31 1980-02-12 Hitachi Ltd Semiconductor

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60160634A (en) * 1984-01-31 1985-08-22 Fujitsu Ltd Semiconductor device
JPS63132433A (en) * 1986-11-21 1988-06-04 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
US9099535B1 (en) 2001-03-13 2015-08-04 Novellus Systems, Inc. Method of depositing a diffusion barrier for copper interconnect applications
US9508593B1 (en) 2001-03-13 2016-11-29 Novellus Systems, Inc. Method of depositing a diffusion barrier for copper interconnect applications
US9117884B1 (en) 2003-04-11 2015-08-25 Novellus Systems, Inc. Conformal films on semiconductor substrates
US8317923B1 (en) 2004-11-03 2012-11-27 Novellus Systems, Inc. Protective self-aligned buffer layers for damascene interconnects
US8430992B1 (en) 2004-11-03 2013-04-30 Novellus Systems, Inc. Protective self-aligned buffer layers for damascene interconnects
US8858763B1 (en) 2006-11-10 2014-10-14 Novellus Systems, Inc. Apparatus and methods for deposition and/or etch selectivity
US8268722B2 (en) 2009-06-03 2012-09-18 Novellus Systems, Inc. Interfacial capping layers for interconnects
US8753978B2 (en) 2011-06-03 2014-06-17 Novellus Systems, Inc. Metal and silicon containing capping layers for interconnects
WO2013054823A1 (en) * 2011-10-14 2013-04-18 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US9633896B1 (en) 2015-10-09 2017-04-25 Lam Research Corporation Methods for formation of low-k aluminum-containing etch stop films

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