JPS56131243A - Control signal inserting method - Google Patents

Control signal inserting method

Info

Publication number
JPS56131243A
JPS56131243A JP3459180A JP3459180A JPS56131243A JP S56131243 A JPS56131243 A JP S56131243A JP 3459180 A JP3459180 A JP 3459180A JP 3459180 A JP3459180 A JP 3459180A JP S56131243 A JPS56131243 A JP S56131243A
Authority
JP
Japan
Prior art keywords
signal
circuit
inputted
synchronizing
control signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3459180A
Other languages
Japanese (ja)
Inventor
Takashi Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP3459180A priority Critical patent/JPS56131243A/en
Publication of JPS56131243A publication Critical patent/JPS56131243A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/12—Arrangements providing for calling or supervisory signals
    • H04J3/125—One of the channel pulses or the synchronisation pulse is also used for transmitting monitoring or supervisory signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Communication Control (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To perform high reliability insertion by inserting a control signal without decreasing the number of bits of a synchronizing signal inserted periodically into a data line of a binary digital signal, when inserting a control signal independently of the synchronizing signal. CONSTITUTION:As data line A is inputted to input terminal 7, synchronizing signal detecting circuit 8 detects synchronizing signal 5 or 6 to send a synchronizing pulse to latch circuit 12. This line A is inputted to and converted by shift register 9 into 16-bit parallel data, and signal 6 from register 9 is inputted to majority decising circuit 11 direct while signal 5 is inputted to circuit 11 via NOT circuit 10. When the synchronizing signal is signal 5, 16-bit parallel data whose bits are all held at ''1'' is inputted to circuit 11. On the other hand, when the synchronizing signal is signal 6, data having all bits held at ''0'' is inputted. Consequently, circuit 11 generates bit ''1'' for signal 5 or bit ''0'' for signal 6 to insert a control signal with good periodicity and high reliability.
JP3459180A 1980-03-18 1980-03-18 Control signal inserting method Pending JPS56131243A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3459180A JPS56131243A (en) 1980-03-18 1980-03-18 Control signal inserting method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3459180A JPS56131243A (en) 1980-03-18 1980-03-18 Control signal inserting method

Publications (1)

Publication Number Publication Date
JPS56131243A true JPS56131243A (en) 1981-10-14

Family

ID=12418567

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3459180A Pending JPS56131243A (en) 1980-03-18 1980-03-18 Control signal inserting method

Country Status (1)

Country Link
JP (1) JPS56131243A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6745216B1 (en) 1999-10-29 2004-06-01 Nec Corporation Shift register allowing direct data insertion

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6745216B1 (en) 1999-10-29 2004-06-01 Nec Corporation Shift register allowing direct data insertion

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