JPS56130877A - Control system for burrer memory - Google Patents

Control system for burrer memory

Info

Publication number
JPS56130877A
JPS56130877A JP3402980A JP3402980A JPS56130877A JP S56130877 A JPS56130877 A JP S56130877A JP 3402980 A JP3402980 A JP 3402980A JP 3402980 A JP3402980 A JP 3402980A JP S56130877 A JPS56130877 A JP S56130877A
Authority
JP
Japan
Prior art keywords
storage section
effective display
directory
agreement
address information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3402980A
Other languages
English (en)
Japanese (ja)
Other versions
JPS622344B2 (enrdf_load_stackoverflow
Inventor
Tetsuya Kawakami
Tadaaki Bando
Yasushi Fukunaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Hitachi Industry and Control Solutions Co Ltd
Original Assignee
Hitachi Engineering Co Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Engineering Co Ltd, Hitachi Ltd filed Critical Hitachi Engineering Co Ltd
Priority to JP3402980A priority Critical patent/JPS56130877A/ja
Publication of JPS56130877A publication Critical patent/JPS56130877A/ja
Publication of JPS622344B2 publication Critical patent/JPS622344B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP3402980A 1980-03-19 1980-03-19 Control system for burrer memory Granted JPS56130877A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3402980A JPS56130877A (en) 1980-03-19 1980-03-19 Control system for burrer memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3402980A JPS56130877A (en) 1980-03-19 1980-03-19 Control system for burrer memory

Publications (2)

Publication Number Publication Date
JPS56130877A true JPS56130877A (en) 1981-10-14
JPS622344B2 JPS622344B2 (enrdf_load_stackoverflow) 1987-01-19

Family

ID=12402925

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3402980A Granted JPS56130877A (en) 1980-03-19 1980-03-19 Control system for burrer memory

Country Status (1)

Country Link
JP (1) JPS56130877A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012058973A (ja) * 2010-09-08 2012-03-22 Nec Commun Syst Ltd キャッシュメモリ制御装置と方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51148334A (en) * 1975-06-16 1976-12-20 Hitachi Ltd Buffer memory control method
JPS54106135A (en) * 1978-02-08 1979-08-20 Nec Corp Data process system
JPS54140841A (en) * 1978-04-25 1979-11-01 Nec Corp Memory control system of multiprocessor system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51148334A (en) * 1975-06-16 1976-12-20 Hitachi Ltd Buffer memory control method
JPS54106135A (en) * 1978-02-08 1979-08-20 Nec Corp Data process system
JPS54140841A (en) * 1978-04-25 1979-11-01 Nec Corp Memory control system of multiprocessor system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012058973A (ja) * 2010-09-08 2012-03-22 Nec Commun Syst Ltd キャッシュメモリ制御装置と方法

Also Published As

Publication number Publication date
JPS622344B2 (enrdf_load_stackoverflow) 1987-01-19

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