JPS56127254A - Test method of device - Google Patents

Test method of device

Info

Publication number
JPS56127254A
JPS56127254A JP3039280A JP3039280A JPS56127254A JP S56127254 A JPS56127254 A JP S56127254A JP 3039280 A JP3039280 A JP 3039280A JP 3039280 A JP3039280 A JP 3039280A JP S56127254 A JPS56127254 A JP S56127254A
Authority
JP
Japan
Prior art keywords
package
test
program
storing
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3039280A
Other languages
Japanese (ja)
Inventor
Harukiyo Kano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3039280A priority Critical patent/JPS56127254A/en
Publication of JPS56127254A publication Critical patent/JPS56127254A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/27—Built-in tests

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To realize a test of a device without any input/output device and thus simplify the test facilities, by inserting a package storing a test program and then running the test program. CONSTITUTION:The package 31 storing a test program is inserted between the package 30 at the part where an access is given to the memory unit of an information processor and the connector 20 storing the package 30. Thus an access is possible to the program that is stored in the memory M1 of the package 31 and a part of the program stored in the memory M0 of the package 30 from the basic processing unit. As a result, a test is possible to the basic processing unit by the test program of the package 31.
JP3039280A 1980-03-12 1980-03-12 Test method of device Pending JPS56127254A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3039280A JPS56127254A (en) 1980-03-12 1980-03-12 Test method of device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3039280A JPS56127254A (en) 1980-03-12 1980-03-12 Test method of device

Publications (1)

Publication Number Publication Date
JPS56127254A true JPS56127254A (en) 1981-10-05

Family

ID=12302641

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3039280A Pending JPS56127254A (en) 1980-03-12 1980-03-12 Test method of device

Country Status (1)

Country Link
JP (1) JPS56127254A (en)

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