JPS57127265A - Vector operation processing device - Google Patents
Vector operation processing deviceInfo
- Publication number
- JPS57127265A JPS57127265A JP1310981A JP1310981A JPS57127265A JP S57127265 A JPS57127265 A JP S57127265A JP 1310981 A JP1310981 A JP 1310981A JP 1310981 A JP1310981 A JP 1310981A JP S57127265 A JPS57127265 A JP S57127265A
- Authority
- JP
- Japan
- Prior art keywords
- data
- register
- stored
- unit
- processed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8053—Vector processors
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Complex Calculations (AREA)
Abstract
PURPOSE:To process a polynomial without generating an idle time in the memory access, by providing additionally an extended data register where the output result of an operator is stored and an extended arithmetic unit which executes the operation processing for data of this register. CONSTITUTION:Data can be transferred mutually between the second data register 5 and the second arithmetic unit 6, and data stored in the register 5 is certainly processed by said unit 6. Data processed by the first arithmetic unit 3 is one-way and is stored in the register 5 to reduce the quantity of hardware. Data processed by said unit 6 is one-way and is stored in the first data register 2 and connot be transferred in the reverse direction. The register 5 cannot transmit and receive data to and from a main storage device 1. The operation for a polynomial is executed efficiently by these additionally provided register 5 and said unit 6.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1310981A JPS57127265A (en) | 1981-01-31 | 1981-01-31 | Vector operation processing device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1310981A JPS57127265A (en) | 1981-01-31 | 1981-01-31 | Vector operation processing device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57127265A true JPS57127265A (en) | 1982-08-07 |
Family
ID=11823977
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1310981A Pending JPS57127265A (en) | 1981-01-31 | 1981-01-31 | Vector operation processing device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57127265A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0141908A2 (en) * | 1983-07-27 | 1985-05-22 | Hitachi, Ltd. | Data processing apparatus |
-
1981
- 1981-01-31 JP JP1310981A patent/JPS57127265A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0141908A2 (en) * | 1983-07-27 | 1985-05-22 | Hitachi, Ltd. | Data processing apparatus |
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