JPS56127253A - Test pattern generator - Google Patents

Test pattern generator

Info

Publication number
JPS56127253A
JPS56127253A JP3015380A JP3015380A JPS56127253A JP S56127253 A JPS56127253 A JP S56127253A JP 3015380 A JP3015380 A JP 3015380A JP 3015380 A JP3015380 A JP 3015380A JP S56127253 A JPS56127253 A JP S56127253A
Authority
JP
Japan
Prior art keywords
test pattern
information
test
pattern
tested
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3015380A
Other languages
Japanese (ja)
Other versions
JPS6112294B2 (en
Inventor
Naoaki Narumi
Takako Maekawa
Koji Ishikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP3015380A priority Critical patent/JPS56127253A/en
Publication of JPS56127253A publication Critical patent/JPS56127253A/en
Publication of JPS6112294B2 publication Critical patent/JPS6112294B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/263—Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers

Abstract

PURPOSE:To realize an generation of a complicated test pattern sequence without generating any dummy cycle, by controlling the generated test pattern information by the reverse control signal and through a reverse control circuit and then supplying the test pattern information to the device to be tested. CONSTITUTION:In the test pattern generation mode, a certain test information is generated from the basic pattern generating part 16. At the same time, the test information is reversed at the reverse control circuit 18 by the information that is obtained by giving an access to the pattern memory 17. The information thus obtained is used for the test pattern for the device to be tested. The test information to be applied to the pattern to be tested is written previously into the memory 17 in correspondence to the test pattern sequence or the address signal to be applied to the device to be tested. In such way, a complicated test pattern sequence can be generated.
JP3015380A 1980-03-10 1980-03-10 Test pattern generator Granted JPS56127253A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3015380A JPS56127253A (en) 1980-03-10 1980-03-10 Test pattern generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3015380A JPS56127253A (en) 1980-03-10 1980-03-10 Test pattern generator

Publications (2)

Publication Number Publication Date
JPS56127253A true JPS56127253A (en) 1981-10-05
JPS6112294B2 JPS6112294B2 (en) 1986-04-07

Family

ID=12295802

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3015380A Granted JPS56127253A (en) 1980-03-10 1980-03-10 Test pattern generator

Country Status (1)

Country Link
JP (1) JPS56127253A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004113941A1 (en) * 2003-06-19 2004-12-29 Advantest Corporation Test equipment

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004113941A1 (en) * 2003-06-19 2004-12-29 Advantest Corporation Test equipment
US7299395B2 (en) 2003-06-19 2007-11-20 Advantest Corporation Test apparatus
KR101113437B1 (en) 2003-06-19 2012-02-29 주식회사 아도반테스토 Test equipment

Also Published As

Publication number Publication date
JPS6112294B2 (en) 1986-04-07

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