JPS5612724A - Method for diffusing impurity into semiconductor substrate - Google Patents

Method for diffusing impurity into semiconductor substrate

Info

Publication number
JPS5612724A
JPS5612724A JP8796479A JP8796479A JPS5612724A JP S5612724 A JPS5612724 A JP S5612724A JP 8796479 A JP8796479 A JP 8796479A JP 8796479 A JP8796479 A JP 8796479A JP S5612724 A JPS5612724 A JP S5612724A
Authority
JP
Japan
Prior art keywords
plates
impurities
silicon
semiconductor
deposited
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8796479A
Other languages
Japanese (ja)
Inventor
Isao Ozeki
Katsuhiko Osada
Toshio Okubo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP8796479A priority Critical patent/JPS5612724A/en
Publication of JPS5612724A publication Critical patent/JPS5612724A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2255—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides

Abstract

PURPOSE:To obtain the semiconductor element having few crystal defects by depositing impurities on the surface of the semiconductor plate and diffusing the impurities into it. In this case, the powder of a semiconductor which is of the same kind as said semiconductor plate is scattered on said semiconductor plate and a many number of the semiconductor plates are laminated. CONSTITUTION:Impurities 2 such as B2O3 and P2O5 are deposited on the surface of silicon substrates 1. Then, silicon powder 3 is scattered on the surfaces on which the impurities 2 are deposited, and the silicone plates 1 are laminated with the impurities-deposited surfaces opposing with each other. The combined silicon plates 1 are supported on a supporting tool and arranged on a diffusing boat 4. Then, thermal diffusion treatment is performed. In this method, since the presence of the silicon powder 3 prevents the sticking of the silicon plates together, and since there is no difference in thermal expansion coefficients of the silicon plates 1; crystal defects are not yielded in the silicone plates 1.
JP8796479A 1979-07-11 1979-07-11 Method for diffusing impurity into semiconductor substrate Pending JPS5612724A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8796479A JPS5612724A (en) 1979-07-11 1979-07-11 Method for diffusing impurity into semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8796479A JPS5612724A (en) 1979-07-11 1979-07-11 Method for diffusing impurity into semiconductor substrate

Publications (1)

Publication Number Publication Date
JPS5612724A true JPS5612724A (en) 1981-02-07

Family

ID=13929533

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8796479A Pending JPS5612724A (en) 1979-07-11 1979-07-11 Method for diffusing impurity into semiconductor substrate

Country Status (1)

Country Link
JP (1) JPS5612724A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0198223A (en) * 1987-10-12 1989-04-17 Mitsubishi Metal Corp Method for diffusing impurity into silicon wafer
JPH0198222A (en) * 1987-10-12 1989-04-17 Mitsubishi Metal Corp Method for diffusing impurity into silicon wafer
JPH0198224A (en) * 1987-10-12 1989-04-17 Mitsubishi Metal Corp Method for diffusing impurity into silicon wafer
JPH0251236A (en) * 1988-08-12 1990-02-21 Sanyo Electric Co Ltd Manufacture of semiconductor device
JP2009194012A (en) * 2008-02-12 2009-08-27 Naoetsu Electronics Co Ltd Method of diffusing impurity of semiconductor wafer

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0198223A (en) * 1987-10-12 1989-04-17 Mitsubishi Metal Corp Method for diffusing impurity into silicon wafer
JPH0198222A (en) * 1987-10-12 1989-04-17 Mitsubishi Metal Corp Method for diffusing impurity into silicon wafer
JPH0198224A (en) * 1987-10-12 1989-04-17 Mitsubishi Metal Corp Method for diffusing impurity into silicon wafer
JPH0251236A (en) * 1988-08-12 1990-02-21 Sanyo Electric Co Ltd Manufacture of semiconductor device
JP2009194012A (en) * 2008-02-12 2009-08-27 Naoetsu Electronics Co Ltd Method of diffusing impurity of semiconductor wafer

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