JPS57117234A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57117234A
JPS57117234A JP427881A JP427881A JPS57117234A JP S57117234 A JPS57117234 A JP S57117234A JP 427881 A JP427881 A JP 427881A JP 427881 A JP427881 A JP 427881A JP S57117234 A JPS57117234 A JP S57117234A
Authority
JP
Japan
Prior art keywords
temperature
boron oxide
deposition
silicon wafers
diffusion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP427881A
Other languages
Japanese (ja)
Inventor
Takeo Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP427881A priority Critical patent/JPS57117234A/en
Publication of JPS57117234A publication Critical patent/JPS57117234A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2255—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

PURPOSE:To prevent the generation of a surface pit and the generation of a crystal lattice at the time of conventional high-temperature diffusion positively by lowering the temperature of deposition of boron oxide more than conventional temperature. CONSTITUTION:The boron oxide 4 is deposited onto silicon wafers 3 at the low temperature of 1,000 deg.C, and boron is diffused into the silicon wafers 3 from the boron oxide 4 at the high temperature of 1,100 deg.C. The quantity of the boron oxide deposited onto the silicon wafers need not be more than needed at that time, the temperature of deposition may be 1,000 deg.C when obtaining the sheet resistance of approximately 8OMEGA/mm.<2>, and the temperature of the deposition corresponds to the temperature of diffusion of 1,000 deg.C according to conventional systems.
JP427881A 1981-01-14 1981-01-14 Manufacture of semiconductor device Pending JPS57117234A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP427881A JPS57117234A (en) 1981-01-14 1981-01-14 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP427881A JPS57117234A (en) 1981-01-14 1981-01-14 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS57117234A true JPS57117234A (en) 1982-07-21

Family

ID=11580066

Family Applications (1)

Application Number Title Priority Date Filing Date
JP427881A Pending JPS57117234A (en) 1981-01-14 1981-01-14 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57117234A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0340426A (en) * 1989-07-07 1991-02-21 Fuji Electric Co Ltd Boron diffusion method
JPH0511877U (en) * 1991-08-01 1993-02-19 友勝 伊藤 Drinking straws

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0340426A (en) * 1989-07-07 1991-02-21 Fuji Electric Co Ltd Boron diffusion method
JPH0511877U (en) * 1991-08-01 1993-02-19 友勝 伊藤 Drinking straws

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