JPS56122542A - Leading-in system of automatic equalizer - Google Patents

Leading-in system of automatic equalizer

Info

Publication number
JPS56122542A
JPS56122542A JP2641980A JP2641980A JPS56122542A JP S56122542 A JPS56122542 A JP S56122542A JP 2641980 A JP2641980 A JP 2641980A JP 2641980 A JP2641980 A JP 2641980A JP S56122542 A JPS56122542 A JP S56122542A
Authority
JP
Japan
Prior art keywords
leading
output
circuit
receiving side
descrambler
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2641980A
Other languages
Japanese (ja)
Other versions
JPS6352501B2 (en
Inventor
Takayuki Ogura
Tetsumasa Ooyama
Toshihiko Wakahara
Eiji Hara
Masaharu Shimada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Nippon Telegraph and Telephone Corp filed Critical Fujitsu Ltd
Priority to JP2641980A priority Critical patent/JPS56122542A/en
Publication of JPS56122542A publication Critical patent/JPS56122542A/en
Publication of JPS6352501B2 publication Critical patent/JPS6352501B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03828—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties
    • H04L25/03866—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties using scrambling

Abstract

PURPOSE:To make the system execute the initial leading-in exactly even in case of an excessive error state, by providing a scrambler and a descrambler on the transmission side and the receiving side, respectively, making both of them operate as a PN code generator before leading-in of the automatic equalizer is completed, and hunting the PN generator of the receiving side. CONSTITUTION:A scrambler by the EX-OR circuits 12, 13 and a shift register SR is provided on the transmission side, a transmission input is scrambled to the output of the circuit 13, and a transmission output signal Xk is output. Also, a circuit which is operted as a descrambler by the shift register 26 and the EX-OR circuits 27, 28 is provided on the receiving side, and at the time of the initial leading-in, the (b) side is selected by the selectors 21, 22 by the output of the error supervisory and protective circuit 20, and the descrambler circuit is operated as a PN code generator, so that a PN code signal Xk can be generated. And, the receiving signal is collated with the code signal Xk in the receiving side, and when the number of times of generation of an error in the supervisory time which has been decided in advance is not less than the prescribed number of times, the initial leading-in is executed exactly by hunting the code generator.
JP2641980A 1980-03-03 1980-03-03 Leading-in system of automatic equalizer Granted JPS56122542A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2641980A JPS56122542A (en) 1980-03-03 1980-03-03 Leading-in system of automatic equalizer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2641980A JPS56122542A (en) 1980-03-03 1980-03-03 Leading-in system of automatic equalizer

Publications (2)

Publication Number Publication Date
JPS56122542A true JPS56122542A (en) 1981-09-26
JPS6352501B2 JPS6352501B2 (en) 1988-10-19

Family

ID=12193008

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2641980A Granted JPS56122542A (en) 1980-03-03 1980-03-03 Leading-in system of automatic equalizer

Country Status (1)

Country Link
JP (1) JPS56122542A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0683584A1 (en) * 1994-05-18 1995-11-22 AT&T Corp. Self-synchronizing scrambler/descrambler without error multiplication

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0683584A1 (en) * 1994-05-18 1995-11-22 AT&T Corp. Self-synchronizing scrambler/descrambler without error multiplication
US5530959A (en) * 1994-05-18 1996-06-25 At&T Corp. Self-synchronizing scrambler/descrambler without error multiplication

Also Published As

Publication number Publication date
JPS6352501B2 (en) 1988-10-19

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