JPS5515544A - Generating circuit for syndrome for error correction code generation - Google Patents

Generating circuit for syndrome for error correction code generation

Info

Publication number
JPS5515544A
JPS5515544A JP8785978A JP8785978A JPS5515544A JP S5515544 A JPS5515544 A JP S5515544A JP 8785978 A JP8785978 A JP 8785978A JP 8785978 A JP8785978 A JP 8785978A JP S5515544 A JPS5515544 A JP S5515544A
Authority
JP
Japan
Prior art keywords
syndrome
code
correction code
generating
generating circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8785978A
Other languages
Japanese (ja)
Other versions
JPS605981B2 (en
Inventor
Hidehiko Kobayashi
Hiroshi Ihara
Yukio Takahashi
Noboru Hagiwara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
NEC Corp
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP53087859A priority Critical patent/JPS605981B2/en
Publication of JPS5515544A publication Critical patent/JPS5515544A/en
Publication of JPS605981B2 publication Critical patent/JPS605981B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Detection And Correction Of Errors (AREA)

Abstract

PURPOSE: To obtain a syndrome generating circuit for error correction code generation which operates through binary logic, by composing the syndrome code generating circuit of several equal logic blocks.
CONSTITUTION: Several logic blocks are provided which are provided on the same substrate with the syndrome generating method generating the error-correction-code generating syndrome by at least one section 21 of input data and correction code 23, parity checking method using section 21 and corresponding parity code 24, and switching method sending out the correction code to the syndrome generating method when the correction code is supplied as a check code and the parity code to the parity checking method when the parity code is supplied. Then, the syndrome is generated from the syndrome generating method of either 1st or 2nd logic block.
COPYRIGHT: (C)1980,JPO&Japio
JP53087859A 1978-07-18 1978-07-18 Syndrome generation circuit for error correction code creation Expired JPS605981B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53087859A JPS605981B2 (en) 1978-07-18 1978-07-18 Syndrome generation circuit for error correction code creation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53087859A JPS605981B2 (en) 1978-07-18 1978-07-18 Syndrome generation circuit for error correction code creation

Publications (2)

Publication Number Publication Date
JPS5515544A true JPS5515544A (en) 1980-02-02
JPS605981B2 JPS605981B2 (en) 1985-02-15

Family

ID=13926601

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53087859A Expired JPS605981B2 (en) 1978-07-18 1978-07-18 Syndrome generation circuit for error correction code creation

Country Status (1)

Country Link
JP (1) JPS605981B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6452078A (en) * 1986-06-06 1989-02-28 Adobaansuto Pureeteingu Techno Composition and method for performing electrolytic coating of circuit board without electroless metal coating

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0357188U (en) * 1989-10-09 1991-05-31

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6452078A (en) * 1986-06-06 1989-02-28 Adobaansuto Pureeteingu Techno Composition and method for performing electrolytic coating of circuit board without electroless metal coating

Also Published As

Publication number Publication date
JPS605981B2 (en) 1985-02-15

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