JPS57202153A - Pattern detecting circuit - Google Patents

Pattern detecting circuit

Info

Publication number
JPS57202153A
JPS57202153A JP56087676A JP8767681A JPS57202153A JP S57202153 A JPS57202153 A JP S57202153A JP 56087676 A JP56087676 A JP 56087676A JP 8767681 A JP8767681 A JP 8767681A JP S57202153 A JPS57202153 A JP S57202153A
Authority
JP
Japan
Prior art keywords
pattern
circuit
registers
input data
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56087676A
Other languages
Japanese (ja)
Other versions
JPS6254257B2 (en
Inventor
Masanori Kajiwara
Takao Moriya
Toshinori Tsuboi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Nippon Telegraph and Telephone Corp filed Critical Fujitsu Ltd
Priority to JP56087676A priority Critical patent/JPS57202153A/en
Publication of JPS57202153A publication Critical patent/JPS57202153A/en
Publication of JPS6254257B2 publication Critical patent/JPS6254257B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal

Abstract

PURPOSE:To constitute a pattern detecting circuit with a few registers, by detecting a code pattern in such a way that the state of a memory circuit is set when a pattern inserted at each N-bit to an input data is suitable for the code pattern and the state of the memory circuit is reset when not suited. CONSTITUTION:Explanation is made for the case where a code pattern is 0111. A memory circuit repeating status g0-g3 only when a pattern inserted to an input data at each N-bit is 0111, is relalized with two shift registers 6 and 7, the outputs of which are 0101 and 0011 to the status g0-g3, and two EOR circuits 8 and 9. The registers 6 and 7 are reset with the output of AND circuits 10 and 11. The Q' output of the registers 6 and 7 is inputted to the EOR circuit 8 via an AND circuit 12. The Q output of the registers 6 and 7 and the input data are outputted as the result of pattern detection via an AND circuit 13.
JP56087676A 1981-06-08 1981-06-08 Pattern detecting circuit Granted JPS57202153A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56087676A JPS57202153A (en) 1981-06-08 1981-06-08 Pattern detecting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56087676A JPS57202153A (en) 1981-06-08 1981-06-08 Pattern detecting circuit

Publications (2)

Publication Number Publication Date
JPS57202153A true JPS57202153A (en) 1982-12-10
JPS6254257B2 JPS6254257B2 (en) 1987-11-13

Family

ID=13921536

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56087676A Granted JPS57202153A (en) 1981-06-08 1981-06-08 Pattern detecting circuit

Country Status (1)

Country Link
JP (1) JPS57202153A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6090447A (en) * 1983-10-24 1985-05-21 Nec Corp Frame synchronizing circuit
JPS6376641A (en) * 1986-09-19 1988-04-06 Fujitsu Ltd Synchronizing pattern detecting circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6090447A (en) * 1983-10-24 1985-05-21 Nec Corp Frame synchronizing circuit
JPH0218777B2 (en) * 1983-10-24 1990-04-26 Nippon Electric Co
JPS6376641A (en) * 1986-09-19 1988-04-06 Fujitsu Ltd Synchronizing pattern detecting circuit

Also Published As

Publication number Publication date
JPS6254257B2 (en) 1987-11-13

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