JPS56122227A - Pulse generating circuit - Google Patents
Pulse generating circuitInfo
- Publication number
- JPS56122227A JPS56122227A JP2467880A JP2467880A JPS56122227A JP S56122227 A JPS56122227 A JP S56122227A JP 2467880 A JP2467880 A JP 2467880A JP 2467880 A JP2467880 A JP 2467880A JP S56122227 A JPS56122227 A JP S56122227A
- Authority
- JP
- Japan
- Prior art keywords
- output
- adder
- counter
- circuit
- frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/78—Generating a single train of pulses having a predetermined pattern, e.g. a predetermined number
Landscapes
- Control Of Stepping Motors (AREA)
Abstract
PURPOSE:To utilize the property of a stepping motor up to the maximum, by using an up-down counter to which the clock pulse is supplied, the two latch circuits plus a full-adder each. CONSTITUTION:The CLOCK1 of frequency f0 is supplied to the up-down counter 1, and the contents of the counter 1 increases to put the output into the latch circuit 2. The data of the circuit 2 is put into the full-adder 3, and the output of the adder 3 is put into the latch circuit 4 to be latched and then to be fed back to the adder 3. The carry output of the adder 3 is put into the 1/2 divider 18, and the output of the divider 18 is used for the output of a pulse generator. If 1 is set up at the (N-1)-th bit of the counter 1, the frequency change-over switch SW is set to the f0/2 side. Thus the counter 2 advances the counting with a double-retarded speed. When 1 is set up at the N-th bit, the gate 11 is closed. Thus the output of the circuit 2 becomes constant to ensure a certain output frequency.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2467880A JPS56122227A (en) | 1980-02-29 | 1980-02-29 | Pulse generating circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2467880A JPS56122227A (en) | 1980-02-29 | 1980-02-29 | Pulse generating circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56122227A true JPS56122227A (en) | 1981-09-25 |
JPS6242413B2 JPS6242413B2 (en) | 1987-09-08 |
Family
ID=12144797
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2467880A Granted JPS56122227A (en) | 1980-02-29 | 1980-02-29 | Pulse generating circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56122227A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0845734A2 (en) * | 1996-11-29 | 1998-06-03 | Matsushita Electric Works, Ltd. | Pulse signal generation circuit and pulse signal generation method |
-
1980
- 1980-02-29 JP JP2467880A patent/JPS56122227A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0845734A2 (en) * | 1996-11-29 | 1998-06-03 | Matsushita Electric Works, Ltd. | Pulse signal generation circuit and pulse signal generation method |
EP0845734A3 (en) * | 1996-11-29 | 1999-01-13 | Matsushita Electric Works, Ltd. | Pulse signal generation circuit and pulse signal generation method |
Also Published As
Publication number | Publication date |
---|---|
JPS6242413B2 (en) | 1987-09-08 |
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