JPS56119579A - Digital type vertical synchronizing circuit - Google Patents
Digital type vertical synchronizing circuitInfo
- Publication number
- JPS56119579A JPS56119579A JP2261080A JP2261080A JPS56119579A JP S56119579 A JPS56119579 A JP S56119579A JP 2261080 A JP2261080 A JP 2261080A JP 2261080 A JP2261080 A JP 2261080A JP S56119579 A JPS56119579 A JP S56119579A
- Authority
- JP
- Japan
- Prior art keywords
- counter
- output
- changed
- variable
- average value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
- H04N5/12—Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising
Abstract
PURPOSE:To reduce jitter in an output pulse of a variable counter to prevent pairing, by controlling the variable counter by the averaged value of detected outputs two continuous fields. CONSTITUTION:Plural counters A-E are provided, and counters C and D are used as fixed counters, and counter A is used as a variable counter. Output PB of counter B is constituted by latch circuit 20A and average value circuit 20B, and average value output PP of detection output PB of two continuous fields obtained by counter B is preset to counter A to change the frequency division ratio. When the frequency division ratio is changed, the time to zero count of variable counter A is changed, and therefore, contents of detection output PB of counter C are changed, and average value output PP is changed. By controlling counter A by this output PP, jitter in the output pulse of counter A to prevent pairing.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2261080A JPS56119579A (en) | 1980-02-25 | 1980-02-25 | Digital type vertical synchronizing circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2261080A JPS56119579A (en) | 1980-02-25 | 1980-02-25 | Digital type vertical synchronizing circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56119579A true JPS56119579A (en) | 1981-09-19 |
JPH027224B2 JPH027224B2 (en) | 1990-02-16 |
Family
ID=12087601
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2261080A Granted JPS56119579A (en) | 1980-02-25 | 1980-02-25 | Digital type vertical synchronizing circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56119579A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5294987A (en) * | 1992-07-10 | 1994-03-15 | Thomson Consumer Electronics, Inc. | Field to field vertical panning system |
-
1980
- 1980-02-25 JP JP2261080A patent/JPS56119579A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5294987A (en) * | 1992-07-10 | 1994-03-15 | Thomson Consumer Electronics, Inc. | Field to field vertical panning system |
Also Published As
Publication number | Publication date |
---|---|
JPH027224B2 (en) | 1990-02-16 |
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