JPS56116330A - Output interface circuit - Google Patents

Output interface circuit

Info

Publication number
JPS56116330A
JPS56116330A JP1904380A JP1904380A JPS56116330A JP S56116330 A JPS56116330 A JP S56116330A JP 1904380 A JP1904380 A JP 1904380A JP 1904380 A JP1904380 A JP 1904380A JP S56116330 A JPS56116330 A JP S56116330A
Authority
JP
Japan
Prior art keywords
terminal
voltage vdd
vth
charged
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1904380A
Other languages
Japanese (ja)
Other versions
JPH0127611B2 (en
Inventor
Masaru Uesugi
Takayuki Tanaka
Nobuaki Ieda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd filed Critical Nippon Telegraph and Telephone Corp
Priority to JP1904380A priority Critical patent/JPS56116330A/en
Publication of JPS56116330A publication Critical patent/JPS56116330A/en
Publication of JPH0127611B2 publication Critical patent/JPH0127611B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356017—Bistable circuits using additional transistors in the input circuit
    • H03K3/356052—Bistable circuits using additional transistors in the input circuit using pass gates

Landscapes

  • Manipulation Of Pulses (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To increase the fan-out ability and to enable the use at low voltage power supply, by providing capacitors coupled with delay signals and the delay circuit inside. CONSTITUTION:At reset, terminals 9, 10 are charged to the fixed power supply voltage VDD-MOSFET threshold voltage VTH, terminals 13, 14 are at ground potential and the terminal 13 is in floating state. In activation, when the input signal at the terminal 2 is discharged to the ground potential, for example, the terminal 13 is charged to the voltage VDD and the terminal 3 is to the voltage VDD-VTH, and the terminal 28 starts charging. If the terminal 9 is risen to the voltage VDD+ VTH or more, an MOSFET24 is conductive to cut off an MOSFET11. Since the terminal 13 is charged to the voltage VDD+VTH or more, the output terminal 3 is charged to the voltage VDD. Thus, the loss due to the threshold value VTH can be avoided and the number of fan-out can be increased.
JP1904380A 1980-02-20 1980-02-20 Output interface circuit Granted JPS56116330A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1904380A JPS56116330A (en) 1980-02-20 1980-02-20 Output interface circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1904380A JPS56116330A (en) 1980-02-20 1980-02-20 Output interface circuit

Publications (2)

Publication Number Publication Date
JPS56116330A true JPS56116330A (en) 1981-09-12
JPH0127611B2 JPH0127611B2 (en) 1989-05-30

Family

ID=11988387

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1904380A Granted JPS56116330A (en) 1980-02-20 1980-02-20 Output interface circuit

Country Status (1)

Country Link
JP (1) JPS56116330A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5713819A (en) * 1980-06-27 1982-01-23 Oki Electric Ind Co Ltd Output interface circuit
JPH0290627A (en) * 1988-09-28 1990-03-30 Nec Corp Input circuit
JPH0291947A (en) * 1988-09-28 1990-03-30 Nec Corp Input circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS508450A (en) * 1972-12-29 1975-01-28
JPS51132068A (en) * 1975-05-13 1976-11-16 Nippon Telegr & Teleph Corp <Ntt> Inversional amplification circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS508450A (en) * 1972-12-29 1975-01-28
JPS51132068A (en) * 1975-05-13 1976-11-16 Nippon Telegr & Teleph Corp <Ntt> Inversional amplification circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5713819A (en) * 1980-06-27 1982-01-23 Oki Electric Ind Co Ltd Output interface circuit
JPH0290627A (en) * 1988-09-28 1990-03-30 Nec Corp Input circuit
JPH0291947A (en) * 1988-09-28 1990-03-30 Nec Corp Input circuit

Also Published As

Publication number Publication date
JPH0127611B2 (en) 1989-05-30

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