JPS56114461A - Timing extracting circuit - Google Patents

Timing extracting circuit

Info

Publication number
JPS56114461A
JPS56114461A JP1556080A JP1556080A JPS56114461A JP S56114461 A JPS56114461 A JP S56114461A JP 1556080 A JP1556080 A JP 1556080A JP 1556080 A JP1556080 A JP 1556080A JP S56114461 A JPS56114461 A JP S56114461A
Authority
JP
Japan
Prior art keywords
integrator
output
pll
circuit
extracting circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1556080A
Other languages
English (en)
Other versions
JPS6035862B2 (ja
Inventor
Junsuke Kusanagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP55015560A priority Critical patent/JPS6035862B2/ja
Publication of JPS56114461A publication Critical patent/JPS56114461A/ja
Publication of JPS6035862B2 publication Critical patent/JPS6035862B2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/027Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP55015560A 1980-02-13 1980-02-13 タイミング抽出回路 Expired JPS6035862B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55015560A JPS6035862B2 (ja) 1980-02-13 1980-02-13 タイミング抽出回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55015560A JPS6035862B2 (ja) 1980-02-13 1980-02-13 タイミング抽出回路

Publications (2)

Publication Number Publication Date
JPS56114461A true JPS56114461A (en) 1981-09-09
JPS6035862B2 JPS6035862B2 (ja) 1985-08-16

Family

ID=11892135

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55015560A Expired JPS6035862B2 (ja) 1980-02-13 1980-02-13 タイミング抽出回路

Country Status (1)

Country Link
JP (1) JPS6035862B2 (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61281737A (ja) * 1985-06-07 1986-12-12 Fujitsu Ltd タイミング同期方法
JPS63318848A (ja) * 1987-06-22 1988-12-27 Furuno Electric Co Ltd 同期信号発生回路装置
JPH04326635A (ja) * 1991-04-26 1992-11-16 Tohoku Electric Power Co Inc デジタルデータ伝送におけるクロック抽出回路

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6061352U (ja) * 1983-10-04 1985-04-27 タキゲン製造株式会社 ロツクハンドル装置
JPS6061354U (ja) * 1983-10-04 1985-04-27 タキゲン製造株式会社 ロツクハンドル装置
JPS6061353U (ja) * 1983-10-04 1985-04-27 タキゲン製造株式会社 ロツクハンドル装置

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61281737A (ja) * 1985-06-07 1986-12-12 Fujitsu Ltd タイミング同期方法
JPH0332936B2 (ja) * 1985-06-07 1991-05-15 Fujitsu Ltd
JPS63318848A (ja) * 1987-06-22 1988-12-27 Furuno Electric Co Ltd 同期信号発生回路装置
JPH04326635A (ja) * 1991-04-26 1992-11-16 Tohoku Electric Power Co Inc デジタルデータ伝送におけるクロック抽出回路

Also Published As

Publication number Publication date
JPS6035862B2 (ja) 1985-08-16

Similar Documents

Publication Publication Date Title
JPS5720052A (en) Input data synchronizing circuit
JPS56114461A (en) Timing extracting circuit
JPS5797751A (en) Circuit for adding artificial synchronizing signal
ES464023A1 (es) Perfeccionamientos en circuitos digitales con red de fase sincronizada.
JPS5435666A (en) Timing extraction system
JPS5714259A (en) Vertical synchronizing signal separation circuit
JPS5231630A (en) Test ethod of digital equipment
JPS53144217A (en) Smapling clock reproducer
JPS5787617A (en) Phase shift circuit
JPS5715547A (en) Data receiver
JPS5518172A (en) Automatic frequency control circuit
JPS5424567A (en) Reproducing method of carrier
JPS5247358A (en) Phase lock loop circuit
JPS56166679A (en) Regenerating device for sampling clock
JPS57185707A (en) Frequency conversion circuit
JPS57143963A (en) Data detector
JPS5794915A (en) Demodulating circuit
JPS55136745A (en) Pll circuit extracting cmi signal timing
JPS524157A (en) Carrier regenerator
JPS5752238A (en) Radio receiving circuit
JPS645136A (en) Timing extraction circuit
Ryu et al. Optimum Parameter Determination of PLL Used in Timing Clock Recovery Circuit
JPS5553926A (en) Step-out detecting circuit
JPS5710528A (en) Sampling system
JPS5419346A (en) Digital phase synchronous system