JPS5611370A - Testing method of semiconductor device - Google Patents

Testing method of semiconductor device

Info

Publication number
JPS5611370A
JPS5611370A JP8761779A JP8761779A JPS5611370A JP S5611370 A JPS5611370 A JP S5611370A JP 8761779 A JP8761779 A JP 8761779A JP 8761779 A JP8761779 A JP 8761779A JP S5611370 A JPS5611370 A JP S5611370A
Authority
JP
Japan
Prior art keywords
test
semiconductor device
prescribed time
conductor
applying
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8761779A
Other languages
Japanese (ja)
Inventor
Kiyoshi Iwamori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP8761779A priority Critical patent/JPS5611370A/en
Publication of JPS5611370A publication Critical patent/JPS5611370A/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE: To prevent corrosion of sockets and conductors for bias voltge applying in the PCB test to make the humidity-proof property appreciating method of semiconductor devices efficient, by performing the PCB test after performing the PCS test for a prescribed time.
CONSTITUTION: In the PCS test, a semiconductor device is stored in arbitrary vessel 2 and is held in pressure cooker (PC) vessel 3 for a prescribed time. In the PCB test, semiconductor device 1 is held in PC vessel 3 for a prescribed time while applying a bias voltage from bias terminal to semiconductor device 1 through conductor 4. In this PCB test, conductor 4 and the socket are corroded because they are exposed to PC conditions for a long time. However, applying of the bias voltage does not influence corrosion of semiconductor device 1 until water invades from the external to reach the semiconductor chip. Consequently, conductor 4 and the socket are not exposed to the corrodent atmosphere for a long time by performing the PCB test after performing the PCS test for a prescribed time, and thus, the humidity-proof property can be appreciated efficiently.
COPYRIGHT: (C)1981,JPO&Japio
JP8761779A 1979-07-09 1979-07-09 Testing method of semiconductor device Pending JPS5611370A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8761779A JPS5611370A (en) 1979-07-09 1979-07-09 Testing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8761779A JPS5611370A (en) 1979-07-09 1979-07-09 Testing method of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5611370A true JPS5611370A (en) 1981-02-04

Family

ID=13919926

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8761779A Pending JPS5611370A (en) 1979-07-09 1979-07-09 Testing method of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5611370A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01157270U (en) * 1988-04-19 1989-10-30

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01157270U (en) * 1988-04-19 1989-10-30

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