Classifications

• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B24—GRINDING; POLISHING
  • B24C—ABRASIVE OR RELATED BLASTING WITH PARTICULATE MATERIAL
  • B24C1/00—Methods for use of abrasive blasting for producing particular effects; Use of auxiliary equipment in connection with such methods
  • B24C1/08—Methods for use of abrasive blasting for producing particular effects; Use of auxiliary equipment in connection with such methods for polishing surfaces, e.g. smoothing a surface by making use of liquid-borne abrasives
  • B24C1/083—Deburring
• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B24—GRINDING; POLISHING
  • B24C—ABRASIVE OR RELATED BLASTING WITH PARTICULATE MATERIAL
  • B24C1/00—Methods for use of abrasive blasting for producing particular effects; Use of auxiliary equipment in connection with such methods
• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B24—GRINDING; POLISHING
  • B24C—ABRASIVE OR RELATED BLASTING WITH PARTICULATE MATERIAL
  • B24C3/00—Abrasive blasting machines or devices; Plants
  • B24C3/32—Abrasive blasting machines or devices; Plants designed for abrasive blasting of particular work, e.g. the internal surfaces of cylinder blocks
  • B24C3/322—Abrasive blasting machines or devices; Plants designed for abrasive blasting of particular work, e.g. the internal surfaces of cylinder blocks for electrical components
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
  • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
  • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
  • H01L21/3046—Mechanical treatment, e.g. grinding, polishing, cutting using blasting, e.g. sand-blasting
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
  • H01L21/67005—Apparatus not specifically provided for elsewhere
  • H01L21/67011—Apparatus for manufacture or treatment
  • H01L21/67092—Apparatus for mechanical treatment
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
  • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
  • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
  • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
  • H10D62/104—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices having particular shapes of the bodies at or near reverse-biased junctions, e.g. having bevels or moats

Landscapes

• Engineering & Computer Science (AREA)
• Mechanical Engineering (AREA)
• Computer Hardware Design (AREA)
• Condensed Matter Physics & Semiconductors (AREA)
• General Physics & Mathematics (AREA)
• Manufacturing & Machinery (AREA)
• Physics & Mathematics (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Power Engineering (AREA)
• Thyristors (AREA)
• Mechanical Treatment Of Semiconductor (AREA)
• Pressure Sensors (AREA)
• Crystals, And After-Treatments Of Crystals (AREA)

Applications Claiming Priority (1)

Publications (2)

Family

ID=4401415

Family Applications (1)

Country Status (5)

Families Citing this family (13)

Family Cites Families (8)

• 1973
  • 1973-10-11 CH CH1450973A patent/CH566643A5/xx not_active IP Right Cessation
  • 1973-11-02 DE DE19737339254U patent/DE7339254U/de not_active Expired
  • 1973-11-02 DE DE2354854A patent/DE2354854C2/de not_active Expired
• 1974
  • 1974-10-07 JP JP11544074A patent/JPS5611225B2/ja not_active Expired
  • 1974-10-09 GB GB4368574A patent/GB1460645A/en not_active Expired
  • 1974-10-11 US US05/514,251 patent/US3953941A/en not_active Expired - Lifetime

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