JPS56112125A - Logical circuit - Google Patents
Logical circuitInfo
- Publication number
- JPS56112125A JPS56112125A JP1565580A JP1565580A JPS56112125A JP S56112125 A JPS56112125 A JP S56112125A JP 1565580 A JP1565580 A JP 1565580A JP 1565580 A JP1565580 A JP 1565580A JP S56112125 A JPS56112125 A JP S56112125A
- Authority
- JP
- Japan
- Prior art keywords
- output
- mosfets
- input
- case
- electric potential
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
- H03K19/21—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical
- H03K19/215—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical using field-effect transistors
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE:To reduce a loss of the effective area by the coupling line nd raise the integration degree, by connecting in series plural logical circuits in which the series connectors of plural transistors have been connected in parallel, and obtaining an exclusive ''or'' output. CONSTITUTION:In case when the input is a logical level and (A1, A2, A3) (B1, B2, B3) (0, 0, 0), the MOSFETs 7, 8, 15, 16, 23, 24 conduct, the low electric potential VL is transferred to the output C0, and in case when the input is (A1, A2, A3) (B1, B2, B3) (1, 1, 1), the MOSFETs 5, 6, 13, 14, 21, 22 conduct, and the low electric potential VL is transferred to the output C0'. On the other hand, in case when (A1, A2, A3) and (B1, B2, B3) in the input are not , at least one pair of the MOSFETs 1 and 2, 3, and 4, 9 and 10, 11 and 12, 17 and 18, 19 and 20 becomes a conducting state at the same time, and there exists a bus to the high electric potential VH, therefore, a logical level 1 is generated in the output C0'.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1565580A JPS56112125A (en) | 1980-02-12 | 1980-02-12 | Logical circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1565580A JPS56112125A (en) | 1980-02-12 | 1980-02-12 | Logical circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56112125A true JPS56112125A (en) | 1981-09-04 |
JPH0127612B2 JPH0127612B2 (en) | 1989-05-30 |
Family
ID=11894730
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1565580A Granted JPS56112125A (en) | 1980-02-12 | 1980-02-12 | Logical circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56112125A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0085762A2 (en) * | 1981-12-21 | 1983-08-17 | International Business Machines Corporation | Logic parity circuit |
JPS62293426A (en) * | 1986-06-12 | 1987-12-21 | Matsushita Electric Ind Co Ltd | Coincidence detecting circuit |
-
1980
- 1980-02-12 JP JP1565580A patent/JPS56112125A/en active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0085762A2 (en) * | 1981-12-21 | 1983-08-17 | International Business Machines Corporation | Logic parity circuit |
EP0085762A3 (en) * | 1981-12-21 | 1986-03-19 | International Business Machines Corporation | Logic parity circuit |
JPS62293426A (en) * | 1986-06-12 | 1987-12-21 | Matsushita Electric Ind Co Ltd | Coincidence detecting circuit |
Also Published As
Publication number | Publication date |
---|---|
JPH0127612B2 (en) | 1989-05-30 |
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