JPS56110147A - Buffer memory circuit - Google Patents

Buffer memory circuit

Info

Publication number
JPS56110147A
JPS56110147A JP1275080A JP1275080A JPS56110147A JP S56110147 A JPS56110147 A JP S56110147A JP 1275080 A JP1275080 A JP 1275080A JP 1275080 A JP1275080 A JP 1275080A JP S56110147 A JPS56110147 A JP S56110147A
Authority
JP
Japan
Prior art keywords
output
becomes
memory
counter
write
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1275080A
Other languages
English (en)
Japanese (ja)
Other versions
JPS639413B2 (enrdf_load_stackoverflow
Inventor
Rikio Maruta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1275080A priority Critical patent/JPS56110147A/ja
Publication of JPS56110147A publication Critical patent/JPS56110147A/ja
Publication of JPS639413B2 publication Critical patent/JPS639413B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Time-Division Multiplex Systems (AREA)
JP1275080A 1980-02-05 1980-02-05 Buffer memory circuit Granted JPS56110147A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1275080A JPS56110147A (en) 1980-02-05 1980-02-05 Buffer memory circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1275080A JPS56110147A (en) 1980-02-05 1980-02-05 Buffer memory circuit

Publications (2)

Publication Number Publication Date
JPS56110147A true JPS56110147A (en) 1981-09-01
JPS639413B2 JPS639413B2 (enrdf_load_stackoverflow) 1988-02-29

Family

ID=11814087

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1275080A Granted JPS56110147A (en) 1980-02-05 1980-02-05 Buffer memory circuit

Country Status (1)

Country Link
JP (1) JPS56110147A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60240237A (ja) * 1984-05-15 1985-11-29 Nec Corp タイミング整合回路
JP2020084480A (ja) * 2018-11-20 2020-06-04 ランデックス工業株式会社 アンカー補強土壁構造

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60240237A (ja) * 1984-05-15 1985-11-29 Nec Corp タイミング整合回路
JP2020084480A (ja) * 2018-11-20 2020-06-04 ランデックス工業株式会社 アンカー補強土壁構造

Also Published As

Publication number Publication date
JPS639413B2 (enrdf_load_stackoverflow) 1988-02-29

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