JPS56107647A - Switch circuit - Google Patents

Switch circuit

Info

Publication number
JPS56107647A
JPS56107647A JP927080A JP927080A JPS56107647A JP S56107647 A JPS56107647 A JP S56107647A JP 927080 A JP927080 A JP 927080A JP 927080 A JP927080 A JP 927080A JP S56107647 A JPS56107647 A JP S56107647A
Authority
JP
Japan
Prior art keywords
output
voltage
becomes
input terminal
pop noise
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP927080A
Other languages
Japanese (ja)
Inventor
Tatsuo Numata
Koji Ishida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Electronic Corp filed Critical Pioneer Electronic Corp
Priority to JP927080A priority Critical patent/JPS56107647A/en
Publication of JPS56107647A publication Critical patent/JPS56107647A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G3/00—Gain control in amplifiers or frequency changers
    • H03G3/20—Automatic control
    • H03G3/30—Automatic control in amplifiers having semiconductor devices
    • H03G3/34—Muting amplifier when no signal is present or when only weak signals are present, or caused by the presence of noise signals, e.g. squelch systems
    • H03G3/345—Muting during a short period of time when noise pulses are detected, i.e. blanking

Landscapes

  • Amplifiers (AREA)
  • Noise Elimination (AREA)

Abstract

PURPOSE:To prevent a pop noise by gentling varying an output signal in accordance with on and off of the input signal. CONSTITUTION:When DC voltage for the muting control is applied to the control signal input terminal S1, generation of the harmonic distortion is suppressed each other by the SEPP circuit consisting of the diodes D1, D2 and the transistors Q6, Q7, Q8, Q9, and the distortion is not generated in the output. Subsequently, when DC voltage which is applied to the input terminal S1 becomes zero, the output becomes a floating state, the potential of the output terminal OUT becomes 1/2 of the supply voltage gradually, and a pop noise is prevented.
JP927080A 1980-01-31 1980-01-31 Switch circuit Pending JPS56107647A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP927080A JPS56107647A (en) 1980-01-31 1980-01-31 Switch circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP927080A JPS56107647A (en) 1980-01-31 1980-01-31 Switch circuit

Publications (1)

Publication Number Publication Date
JPS56107647A true JPS56107647A (en) 1981-08-26

Family

ID=11715753

Family Applications (1)

Application Number Title Priority Date Filing Date
JP927080A Pending JPS56107647A (en) 1980-01-31 1980-01-31 Switch circuit

Country Status (1)

Country Link
JP (1) JPS56107647A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58154903A (en) * 1982-03-10 1983-09-14 Toshiba Corp Power amplifier

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58154903A (en) * 1982-03-10 1983-09-14 Toshiba Corp Power amplifier
JPH0370405B2 (en) * 1982-03-10 1991-11-07 Tokyo Shibaura Electric Co

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