JPS5631228A - Tri-state output circuit - Google Patents

Tri-state output circuit

Info

Publication number
JPS5631228A
JPS5631228A JP10689879A JP10689879A JPS5631228A JP S5631228 A JPS5631228 A JP S5631228A JP 10689879 A JP10689879 A JP 10689879A JP 10689879 A JP10689879 A JP 10689879A JP S5631228 A JPS5631228 A JP S5631228A
Authority
JP
Japan
Prior art keywords
transistor
tri
collector
emitter
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10689879A
Other languages
Japanese (ja)
Inventor
Kazuyasu Ejiri
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10689879A priority Critical patent/JPS5631228A/en
Publication of JPS5631228A publication Critical patent/JPS5631228A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/091Integrated injection logic or merged transistor logic
    • H03K19/0917Multistate logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To make the switching speed high, by holding the base voltage of the transistor, which controls the output-stage transistor, constant when the tri-state output is changed from a high impedance to a high level. CONSTITUTION:The fourth transistor Q6 where turning-on and off are controlled by the input signal has the emitter earthed and the collector connected to power source VCC through diode D6 where the cathode side is connected, the base of the third transistor Q7, and resistance R4. The gata for tri-state control is connected to the base of the third transistor Q7 through diode D3, and turning-on and off of the first transistor Q11, which has the emitter connected to the output terminal and the collector the connected to the power source side, and the second transistor, which has the emitter earthed and collector connected to the output terminal, are controlled by this transistor Q9.
JP10689879A 1979-08-22 1979-08-22 Tri-state output circuit Pending JPS5631228A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10689879A JPS5631228A (en) 1979-08-22 1979-08-22 Tri-state output circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10689879A JPS5631228A (en) 1979-08-22 1979-08-22 Tri-state output circuit

Publications (1)

Publication Number Publication Date
JPS5631228A true JPS5631228A (en) 1981-03-30

Family

ID=14445278

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10689879A Pending JPS5631228A (en) 1979-08-22 1979-08-22 Tri-state output circuit

Country Status (1)

Country Link
JP (1) JPS5631228A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4745308A (en) * 1983-02-18 1988-05-17 Motorola, Inc. Non-inverting three state TTL logic with improved switching from a high impedance state to an active high state

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4745308A (en) * 1983-02-18 1988-05-17 Motorola, Inc. Non-inverting three state TTL logic with improved switching from a high impedance state to an active high state

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