JPS56103589A - Time-division channel control system - Google Patents

Time-division channel control system

Info

Publication number
JPS56103589A
JPS56103589A JP611480A JP611480A JPS56103589A JP S56103589 A JPS56103589 A JP S56103589A JP 611480 A JP611480 A JP 611480A JP 611480 A JP611480 A JP 611480A JP S56103589 A JPS56103589 A JP S56103589A
Authority
JP
Japan
Prior art keywords
channel
time
supplied
switch
signal line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP611480A
Other languages
Japanese (ja)
Other versions
JPS616595B2 (en
Inventor
Kiyoshi Abe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP611480A priority Critical patent/JPS56103589A/en
Publication of JPS56103589A publication Critical patent/JPS56103589A/en
Publication of JPS616595B2 publication Critical patent/JPS616595B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

PURPOSE:To ensure a control of channel requiring no control procedure by using a frame bit position of an envelope data within a channel for a channel controlling information bit. CONSTITUTION:The error signal within the mulitplication switch circuit 7 relating to a switch process is supplied through the signal line 16. While the data meaning the unset of path and read out of the switch holding memory 6 of input side is supplied through the signal line 17. At the same time, the envelope data sent out to the time-division channel 2 is supplied through the signal line 18 in the form of the timing signal showing the position and time of the frame bit. Then the data produced under the conditions of signal lines 16 and 17 is inserted into the position of the frame bit through the AND gate 19. And thus the path control state of the time-division multiplication switch part 1 is sent to the separating switch part of the rear state via the channel 2.
JP611480A 1980-01-21 1980-01-21 Time-division channel control system Granted JPS56103589A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP611480A JPS56103589A (en) 1980-01-21 1980-01-21 Time-division channel control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP611480A JPS56103589A (en) 1980-01-21 1980-01-21 Time-division channel control system

Publications (2)

Publication Number Publication Date
JPS56103589A true JPS56103589A (en) 1981-08-18
JPS616595B2 JPS616595B2 (en) 1986-02-27

Family

ID=11629468

Family Applications (1)

Application Number Title Priority Date Filing Date
JP611480A Granted JPS56103589A (en) 1980-01-21 1980-01-21 Time-division channel control system

Country Status (1)

Country Link
JP (1) JPS56103589A (en)

Also Published As

Publication number Publication date
JPS616595B2 (en) 1986-02-27

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