JPS53111247A - Control system for memory unit - Google Patents

Control system for memory unit

Info

Publication number
JPS53111247A
JPS53111247A JP1988577A JP1988577A JPS53111247A JP S53111247 A JPS53111247 A JP S53111247A JP 1988577 A JP1988577 A JP 1988577A JP 1988577 A JP1988577 A JP 1988577A JP S53111247 A JPS53111247 A JP S53111247A
Authority
JP
Japan
Prior art keywords
control system
memory unit
write
memory
clocks
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1988577A
Other languages
Japanese (ja)
Other versions
JPS5823680B2 (en
Inventor
Shozo Taniguchi
Kiyokatsu Iijima
Miyoshi Kikuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP52019885A priority Critical patent/JPS5823680B2/en
Publication of JPS53111247A publication Critical patent/JPS53111247A/en
Publication of JPS5823680B2 publication Critical patent/JPS5823680B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To protect a memory with a write operation stopped in case of the existence of an error in the inputted write data, by controlling the time at which a write starting signal is transmitted at the period of clocks.
COPYRIGHT: (C)1978,JPO&Japio
JP52019885A 1977-02-25 1977-02-25 Storage device control method Expired JPS5823680B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52019885A JPS5823680B2 (en) 1977-02-25 1977-02-25 Storage device control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52019885A JPS5823680B2 (en) 1977-02-25 1977-02-25 Storage device control method

Publications (2)

Publication Number Publication Date
JPS53111247A true JPS53111247A (en) 1978-09-28
JPS5823680B2 JPS5823680B2 (en) 1983-05-17

Family

ID=12011648

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52019885A Expired JPS5823680B2 (en) 1977-02-25 1977-02-25 Storage device control method

Country Status (1)

Country Link
JP (1) JPS5823680B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04107659A (en) * 1990-08-28 1992-04-09 Nec Corp Preventing circuit for miswrite of data to memory

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60148080U (en) * 1984-03-14 1985-10-01 大成建設株式会社 grizzly equipment
JPS60257882A (en) * 1984-06-06 1985-12-19 株式会社ブリヂストン Separator for coarse substance
JPS61175248U (en) * 1985-04-17 1986-10-31
JPS645680U (en) * 1987-06-26 1989-01-12

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5030434A (en) * 1973-06-27 1975-03-26

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5030434A (en) * 1973-06-27 1975-03-26

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04107659A (en) * 1990-08-28 1992-04-09 Nec Corp Preventing circuit for miswrite of data to memory

Also Published As

Publication number Publication date
JPS5823680B2 (en) 1983-05-17

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