JPS56101750A - Method of mounting and packaging silicon unit on ceramic substrate and package unit therefor - Google Patents

Method of mounting and packaging silicon unit on ceramic substrate and package unit therefor

Info

Publication number
JPS56101750A
JPS56101750A JP82081A JP82081A JPS56101750A JP S56101750 A JPS56101750 A JP S56101750A JP 82081 A JP82081 A JP 82081A JP 82081 A JP82081 A JP 82081A JP S56101750 A JPS56101750 A JP S56101750A
Authority
JP
Japan
Prior art keywords
unit
mounting
ceramic substrate
therefor
packaging silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP82081A
Other languages
English (en)
Japanese (ja)
Inventor
Rodorige Esuteii Rui Jiyatsuku
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nortel Networks Ltd
Original Assignee
Northern Telecom Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Northern Telecom Ltd filed Critical Northern Telecom Ltd
Publication of JPS56101750A publication Critical patent/JPS56101750A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69—Insulating materials thereof
    • H10W70/698—Semiconductor materials that are electrically insulating, e.g. undoped silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10—Containers or parts thereof
    • H10W76/12—Containers or parts thereof characterised by their shape
    • H10W76/15—Containers comprising an insulating or insulated base
    • H10W76/157—Containers comprising an insulating or insulated base having interconnections parallel to the insulating or insulated base
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07331—Connecting techniques
    • H10W72/07337—Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
    • H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.

Landscapes

  • Solid State Image Pick-Up Elements (AREA)
  • Wire Bonding (AREA)
  • Die Bonding (AREA)
JP82081A 1980-01-09 1981-01-08 Method of mounting and packaging silicon unit on ceramic substrate and package unit therefor Pending JPS56101750A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CA343,318A CA1115852A (en) 1980-01-09 1980-01-09 Mounting and packaging of silicon devices on ceramic substrates, and assemblies containing silicon devices

Publications (1)

Publication Number Publication Date
JPS56101750A true JPS56101750A (en) 1981-08-14

Family

ID=4116006

Family Applications (2)

Application Number Title Priority Date Filing Date
JP82081A Pending JPS56101750A (en) 1980-01-09 1981-01-08 Method of mounting and packaging silicon unit on ceramic substrate and package unit therefor
JP1990020545U Expired JPH0410700Y2 (enExample) 1980-01-09 1990-03-02

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP1990020545U Expired JPH0410700Y2 (enExample) 1980-01-09 1990-03-02

Country Status (5)

Country Link
US (1) US4406054A (enExample)
EP (1) EP0032565B1 (enExample)
JP (2) JPS56101750A (enExample)
CA (1) CA1115852A (enExample)
DE (1) DE3070907D1 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4566170A (en) * 1983-05-10 1986-01-28 Pitney Bowes Inc. Method of producing a light emiting diode array
US4760440A (en) * 1983-10-31 1988-07-26 General Electric Company Package for solid state image sensors
DE3516954A1 (de) * 1984-05-14 1985-11-14 Gigabit Logic, Inc., Newbury Park, Calif. Montierte integrierte schaltung
US5162251A (en) * 1991-03-18 1992-11-10 Hughes Danbury Optical Systems, Inc. Method for making thinned charge-coupled devices
JP4663304B2 (ja) * 2004-11-30 2011-04-06 株式会社吉野工業所 液状物の注出容器

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3577037A (en) * 1968-07-05 1971-05-04 Ibm Diffused electrical connector apparatus and method of making same
US3984620A (en) * 1975-06-04 1976-10-05 Raytheon Company Integrated circuit chip test and assembly package

Also Published As

Publication number Publication date
DE3070907D1 (en) 1985-08-29
EP0032565A1 (en) 1981-07-29
CA1115852A (en) 1982-01-05
JPH0410700Y2 (enExample) 1992-03-17
JPH0357946U (enExample) 1991-06-05
US4406054A (en) 1983-09-27
EP0032565B1 (en) 1985-07-24

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