JPS5599610A - Digital proportional receiver - Google Patents

Digital proportional receiver

Info

Publication number
JPS5599610A
JPS5599610A JP664079A JP664079A JPS5599610A JP S5599610 A JPS5599610 A JP S5599610A JP 664079 A JP664079 A JP 664079A JP 664079 A JP664079 A JP 664079A JP S5599610 A JPS5599610 A JP S5599610A
Authority
JP
Japan
Prior art keywords
circuit
circuits
trt
signal
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP664079A
Other languages
Japanese (ja)
Inventor
Kouichi Yagihashi
Hisahiro Mitani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toko Inc
Original Assignee
Toko Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toko Inc filed Critical Toko Inc
Priority to JP664079A priority Critical patent/JPS5599610A/en
Publication of JPS5599610A publication Critical patent/JPS5599610A/en
Pending legal-status Critical Current

Links

Landscapes

  • Control Of Position, Course, Altitude, Or Attitude Of Moving Bodies (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

PURPOSE: To obtain a receiver which posseses the circuit suited to formation of the 1-chip IC by forming the ligic circuit part of the decoder circuit with the injection- type logic circuit I2L.
CONSTITUTION: The decoder circuit consists of D-type FF circuits 5 and 6 plus driving circuit 7 of the FF circuit, and elements Q1WQ28 forming the logic circuits of circuits 5W7 are composed of I2L. With application of the pulse signal to input terminal 8 of circuit 7, the signal is amplified through transistor TrT1. And the clock signal is sent to I2LQ13 and Q21 of circuits 5 and 6 via I2LQ12 to drive the FF circuit, and the pulse signals of channels 1 and 2 are delivered from I2LQ20 and Q28 to terminals 9 and 10 via TrT4 and T5. At the same time, TrT3 is turned on during continuation of the input pulse via circuit 7 and through integrated circuits R4 and C1, and the inverted signal is applied to I2LQ20 and Q28 of circuits 5 and 6 from I2LQ11. Accordingly, the O level is applied to I2LQ20 and Q28 from I2LQ11 when the input signal does not exist and the FF circuit becomes unsteady. Thus TrT4 and T5 are turned on to change output ends 9 and 10 to 0.
COPYRIGHT: (C)1980,JPO&Japio
JP664079A 1979-01-23 1979-01-23 Digital proportional receiver Pending JPS5599610A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP664079A JPS5599610A (en) 1979-01-23 1979-01-23 Digital proportional receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP664079A JPS5599610A (en) 1979-01-23 1979-01-23 Digital proportional receiver

Publications (1)

Publication Number Publication Date
JPS5599610A true JPS5599610A (en) 1980-07-29

Family

ID=11643958

Family Applications (1)

Application Number Title Priority Date Filing Date
JP664079A Pending JPS5599610A (en) 1979-01-23 1979-01-23 Digital proportional receiver

Country Status (1)

Country Link
JP (1) JPS5599610A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5950141U (en) * 1982-09-25 1984-04-03 東光株式会社 FM receiver
JPS6247710A (en) * 1985-08-26 1987-03-02 Namuko:Kk Remote control equipment

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5950141U (en) * 1982-09-25 1984-04-03 東光株式会社 FM receiver
JPS6334360Y2 (en) * 1982-09-25 1988-09-12
JPS6247710A (en) * 1985-08-26 1987-03-02 Namuko:Kk Remote control equipment

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