JPS57192119A - Complementary mos type sequence circuit - Google Patents

Complementary mos type sequence circuit

Info

Publication number
JPS57192119A
JPS57192119A JP56077306A JP7730681A JPS57192119A JP S57192119 A JPS57192119 A JP S57192119A JP 56077306 A JP56077306 A JP 56077306A JP 7730681 A JP7730681 A JP 7730681A JP S57192119 A JPS57192119 A JP S57192119A
Authority
JP
Japan
Prior art keywords
level
signal
signal inversion
inverted
inversion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56077306A
Other languages
Japanese (ja)
Inventor
Masahiro Hasegawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56077306A priority Critical patent/JPS57192119A/en
Publication of JPS57192119A publication Critical patent/JPS57192119A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors

Abstract

PURPOSE:To reduce the number of elements and a chip size at integration by constituting a circuit with four complementary MOS transistors. CONSTITUTION:Assuming that a set signal inversion S' and a reset signal inversion R' are both at level 1, no charge is stored in a capacitor C1, and a charge is stored in a capacitor C2. In this state, since a P channel MOS transistor TR55 turns on and an N channel MOS TR56 turns off, a signal inversion Q' is at 1, and since a P channel MOSTR57 turns off and an N channel MOSTR58 turns on, a Q signal is 0. Next, when the signal inversion S' drops to 0, although the Q signal inverts to 1 level, the signal inversion Q remains at 0 level. Next, even if a signal inversion R' remains at 1 level and the signal inversion S' rises at 1 level, the state is unchanged. When the signal inversion R' is inverted to 0 level, the Q signal is inverted to 0 level. When the Q signal is inverted to 0 level, the signal inversion Q' is inverted to 1 level. Even if the signal inversion Q' is inverted, the Q signal remains to 0 level.
JP56077306A 1981-05-21 1981-05-21 Complementary mos type sequence circuit Pending JPS57192119A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56077306A JPS57192119A (en) 1981-05-21 1981-05-21 Complementary mos type sequence circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56077306A JPS57192119A (en) 1981-05-21 1981-05-21 Complementary mos type sequence circuit

Publications (1)

Publication Number Publication Date
JPS57192119A true JPS57192119A (en) 1982-11-26

Family

ID=13630221

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56077306A Pending JPS57192119A (en) 1981-05-21 1981-05-21 Complementary mos type sequence circuit

Country Status (1)

Country Link
JP (1) JPS57192119A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0703670A3 (en) * 1994-09-26 1996-09-11 Nec Corp Output buffer circuit
JP2012257188A (en) * 2010-08-25 2012-12-27 Semiconductor Energy Lab Co Ltd Latch circuit and semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0703670A3 (en) * 1994-09-26 1996-09-11 Nec Corp Output buffer circuit
US5646571A (en) * 1994-09-26 1997-07-08 Nec Corporation Output buffer circuits
JP2012257188A (en) * 2010-08-25 2012-12-27 Semiconductor Energy Lab Co Ltd Latch circuit and semiconductor device

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