JPS5595369A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5595369A
JPS5595369A JP237879A JP237879A JPS5595369A JP S5595369 A JPS5595369 A JP S5595369A JP 237879 A JP237879 A JP 237879A JP 237879 A JP237879 A JP 237879A JP S5595369 A JPS5595369 A JP S5595369A
Authority
JP
Japan
Prior art keywords
region
type
gate
neighborhood
diffused
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP237879A
Other languages
Japanese (ja)
Other versions
JPS6346587B2 (en
Inventor
Junichi Nishizawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Research Foundation
Original Assignee
Semiconductor Research Foundation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Research Foundation filed Critical Semiconductor Research Foundation
Priority to JP237879A priority Critical patent/JPS5595369A/en
Priority to US06/018,774 priority patent/US4364072A/en
Priority to DE2910566A priority patent/DE2910566C2/en
Publication of JPS5595369A publication Critical patent/JPS5595369A/en
Priority to US06/386,313 priority patent/US4504847A/en
Publication of JPS6346587B2 publication Critical patent/JPS6346587B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/7722Field effect transistors using static field induced regions, e.g. SIT, PBT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025Channel region of field-effect devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7391Gated diode structures
    • H01L29/7392Gated diode structures with PN junction gate, e.g. field controlled thyristors (FCTh), static induction thyristors (SITh)

Abstract

PURPOSE:To obtain an electrostatic induction type transistor with a short traveling time and a high conversion transconductance by making shorter than usual a region in which the potential gradient in the neighborhood of an intrinsic gate is gentle, and further bringing the intrinsic gate close to a high impurity concentration source region. CONSTITUTION:An n<->-type layer 13 is grown on n<+>-type semiconductor substrate 11, which is to become a drain region. Here, two p<+>-type gate regions 14 are diffused at a distance from each other. Between these regions in layer 13, n<-> or i- type intrinsic gate region 113 of an extremely low impurity concentration is provided. On top of this, n<+>-types source region 12 is diffused. Subsequently, the entire surface is covered with an SiO2 film 5, and openings are made. Source electrode 2 is fitted to region 12. Gate electrodes 4 are connected in parallel to two rgions 14. On the back of substrate 11, drain electrode 1 is fitted. By this, it is possible to produce a potential peak in the neighborhood of region 12. As a result, the traveling velocity of electrons injected from region 12 becomes high, and the conversion transconductance becomes large.
JP237879A 1978-03-17 1979-01-11 Semiconductor device Granted JPS5595369A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP237879A JPS5595369A (en) 1979-01-11 1979-01-11 Semiconductor device
US06/018,774 US4364072A (en) 1978-03-17 1979-03-08 Static induction type semiconductor device with multiple doped layers for potential modification
DE2910566A DE2910566C2 (en) 1978-03-17 1979-03-17 Static induction semiconductor device
US06/386,313 US4504847A (en) 1978-03-17 1982-06-08 Static induction type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP237879A JPS5595369A (en) 1979-01-11 1979-01-11 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5595369A true JPS5595369A (en) 1980-07-19
JPS6346587B2 JPS6346587B2 (en) 1988-09-16

Family

ID=11527573

Family Applications (1)

Application Number Title Priority Date Filing Date
JP237879A Granted JPS5595369A (en) 1978-03-17 1979-01-11 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5595369A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5793439A (en) * 1988-07-13 1998-08-11 Seiko Epson Corporation Image control device for use in a video multiplexing system for superimposition of scalable video data streams upon a background video data stream
US5929870A (en) * 1988-07-13 1999-07-27 Seiko Epson Corporation Video multiplexing system for superimposition of scalable video data streams upon a background video data stream

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5128765A (en) * 1974-09-04 1976-03-11 Tokyo Shibaura Electric Co TATEGATASETSUGODENKAIKOKAHANDOTAISOCHI

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5128765A (en) * 1974-09-04 1976-03-11 Tokyo Shibaura Electric Co TATEGATASETSUGODENKAIKOKAHANDOTAISOCHI

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5793439A (en) * 1988-07-13 1998-08-11 Seiko Epson Corporation Image control device for use in a video multiplexing system for superimposition of scalable video data streams upon a background video data stream
US5929870A (en) * 1988-07-13 1999-07-27 Seiko Epson Corporation Video multiplexing system for superimposition of scalable video data streams upon a background video data stream
US5929933A (en) * 1988-07-13 1999-07-27 Seiko Epson Corporation Video multiplexing system for superimposition of scalable video data streams upon a background video data stream
US5973706A (en) * 1988-07-13 1999-10-26 Seiko Epson Corporation Video multiplexing system for superimposition of scalable video data streams upon a background video data stream
US5986633A (en) * 1988-07-13 1999-11-16 Seiko Epson Corporation Video multiplexing system for superimposition of scalable video data streams upon a background video data stream
USRE37879E1 (en) 1988-07-13 2002-10-15 Seiko Epson Corporation Image control device for use in a video multiplexing system for superimposition of scalable video data streams upon a background video data stream

Also Published As

Publication number Publication date
JPS6346587B2 (en) 1988-09-16

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