JPS5589969A - Address conversion unit - Google Patents

Address conversion unit

Info

Publication number
JPS5589969A
JPS5589969A JP16414578A JP16414578A JPS5589969A JP S5589969 A JPS5589969 A JP S5589969A JP 16414578 A JP16414578 A JP 16414578A JP 16414578 A JP16414578 A JP 16414578A JP S5589969 A JPS5589969 A JP S5589969A
Authority
JP
Japan
Prior art keywords
bit
signal
address data
digit
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16414578A
Other languages
Japanese (ja)
Inventor
Kohei Ogawa
Yukio Murata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP16414578A priority Critical patent/JPS5589969A/en
Publication of JPS5589969A publication Critical patent/JPS5589969A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)

Abstract

PURPOSE:To extend the access area, by taking the signal inverting the next high rank digit as the address data depending whether or not the check bit is added to the highest rank digit expressed in 4-bit for one word, or inputting and controlling the signal in the form as it is as the address data. CONSTITUTION:The comparison circuit 12 discriminating whether or not the number of significant information bit n of the most significant bit Am of the address bit to the memory 11 accessed with the binary number BCD m digits of one work in 4-bit is equal to the reference, and two comparison circuits 13, 14 discriminating that the address signal in the next highest digit Am-1 is smaller than 6 or 10, are provided. The control is made that the signal inverting the next highest digit Am-1 depending on whether or not the check bit is added to the most significant bit Am is taken as the address data, or the signal in the form as it is taken as the address data and inputted.
JP16414578A 1978-12-26 1978-12-26 Address conversion unit Pending JPS5589969A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16414578A JPS5589969A (en) 1978-12-26 1978-12-26 Address conversion unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16414578A JPS5589969A (en) 1978-12-26 1978-12-26 Address conversion unit

Publications (1)

Publication Number Publication Date
JPS5589969A true JPS5589969A (en) 1980-07-08

Family

ID=15787595

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16414578A Pending JPS5589969A (en) 1978-12-26 1978-12-26 Address conversion unit

Country Status (1)

Country Link
JP (1) JPS5589969A (en)

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