JPS5588429A - Tripled circuit - Google Patents

Tripled circuit

Info

Publication number
JPS5588429A
JPS5588429A JP16242678A JP16242678A JPS5588429A JP S5588429 A JPS5588429 A JP S5588429A JP 16242678 A JP16242678 A JP 16242678A JP 16242678 A JP16242678 A JP 16242678A JP S5588429 A JPS5588429 A JP S5588429A
Authority
JP
Japan
Prior art keywords
output
majority
lsi
circuit
signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16242678A
Other languages
Japanese (ja)
Other versions
JPS6136412B2 (en
Inventor
Osamu Omoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP16242678A priority Critical patent/JPS5588429A/en
Publication of JPS5588429A publication Critical patent/JPS5588429A/en
Publication of JPS6136412B2 publication Critical patent/JPS6136412B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection

Landscapes

  • Logic Circuits (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Hardware Redundancy (AREA)

Abstract

PURPOSE:To omit the LSI for majority circuit and thus to reduce the area occupied within the package by incorporating the partial circuit for the fault detection and the majority output into the LSI for connection. CONSTITUTION:In case either one of output signals A1, A2 and A3 shows the different value from other two output for function circuits F10, F20 and F30 of LSI100, 200 and 300 each, the output signal of the fault output terminal becomes ''0'' in either combination to detect the fault. And the majority output of signals A1, A2 and A3 turn to output A2 of LSI200 in case the coincidence is obtained between signals A2 and A3 and turns to putput A1 of LSI100 in case no coincidence is obtained between A2 and A3. In such way, the LSI for majority circuit can be omitted by incorporating the partial circuit for the fault detection and the majority output into the LSI for connection, thus decreasing the area occupied within the package.
JP16242678A 1978-12-26 1978-12-26 Tripled circuit Granted JPS5588429A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16242678A JPS5588429A (en) 1978-12-26 1978-12-26 Tripled circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16242678A JPS5588429A (en) 1978-12-26 1978-12-26 Tripled circuit

Publications (2)

Publication Number Publication Date
JPS5588429A true JPS5588429A (en) 1980-07-04
JPS6136412B2 JPS6136412B2 (en) 1986-08-18

Family

ID=15754371

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16242678A Granted JPS5588429A (en) 1978-12-26 1978-12-26 Tripled circuit

Country Status (1)

Country Link
JP (1) JPS5588429A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04307633A (en) * 1991-04-05 1992-10-29 Hitachi Ltd Multiplex controller

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04307633A (en) * 1991-04-05 1992-10-29 Hitachi Ltd Multiplex controller

Also Published As

Publication number Publication date
JPS6136412B2 (en) 1986-08-18

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