JPS56168488A - Signal processor - Google Patents
Signal processorInfo
- Publication number
- JPS56168488A JPS56168488A JP7244180A JP7244180A JPS56168488A JP S56168488 A JPS56168488 A JP S56168488A JP 7244180 A JP7244180 A JP 7244180A JP 7244180 A JP7244180 A JP 7244180A JP S56168488 A JPS56168488 A JP S56168488A
- Authority
- JP
- Japan
- Prior art keywords
- gate
- output
- circuit
- input
- signals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G08—SIGNALLING
- G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
- G08C19/00—Electric signal transmission systems
- G08C19/12—Electric signal transmission systems in which the signal transmitted is frequency or phase of ac
- G08C19/14—Electric signal transmission systems in which the signal transmitted is frequency or phase of ac using combination of fixed frequencies
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Selective Calling Equipment (AREA)
Abstract
PURPOSE:To prevent the malfunction due to a noise, by alternately generating two signals having mutually different frequencies, setting and resetting an FF only when receiving said two signals and then detecting a change of the stable of these two sing nals. CONSTITUTION:The different frequencies generated from resonance circuits 10 and 11 are applied to intergral networks 19 and 23 via diodes 18 and 22. The output of the circuit 19 is spplied to an input of an NAND gate 45, and the output of the circuit 23 is applied to the other input via an NOT gate 46. The output of the gate 45 is reversed by an NOT gate 47 to be applied to an FF28 as a set signal. The output of the circuit 23 is applied to an input of an NAND gate 48, and the output of the circuit 19 is applied to the other input via an NOT gate 49. The output of the gate 48 is applied to an FF28 via an NOT gate 50 as reset signal. Then a change of the stable state of the FF28 is detected by the cooperation of differential capacitors 32 and 35, diodes 33 and 36, an integrating capacitor 34 and a transistor 37 respectively. Then a load 38 is controlled.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7244180A JPS56168488A (en) | 1980-05-29 | 1980-05-29 | Signal processor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7244180A JPS56168488A (en) | 1980-05-29 | 1980-05-29 | Signal processor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56168488A true JPS56168488A (en) | 1981-12-24 |
Family
ID=13489372
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7244180A Pending JPS56168488A (en) | 1980-05-29 | 1980-05-29 | Signal processor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56168488A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5066948A (en) * | 1986-10-01 | 1991-11-19 | Canon Kabushiki Kaisha | Receiver for use in remote control system |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5298881A (en) * | 1976-02-13 | 1977-08-19 | Matsushita Electric Ind Co Ltd | Remote control device |
-
1980
- 1980-05-29 JP JP7244180A patent/JPS56168488A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5298881A (en) * | 1976-02-13 | 1977-08-19 | Matsushita Electric Ind Co Ltd | Remote control device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5066948A (en) * | 1986-10-01 | 1991-11-19 | Canon Kabushiki Kaisha | Receiver for use in remote control system |
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