JPS5582303A - Sequence controller - Google Patents

Sequence controller

Info

Publication number
JPS5582303A
JPS5582303A JP15717978A JP15717978A JPS5582303A JP S5582303 A JPS5582303 A JP S5582303A JP 15717978 A JP15717978 A JP 15717978A JP 15717978 A JP15717978 A JP 15717978A JP S5582303 A JPS5582303 A JP S5582303A
Authority
JP
Japan
Prior art keywords
program
write
cpu
key
erroneous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15717978A
Other languages
Japanese (ja)
Other versions
JPS627563B2 (en
Inventor
Keisuke Kawashima
Hideaki Nakamura
Yoshitane Saito
Kenji Nishikido
Kiyoto Hirase
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omron Tateisi Electronics Co filed Critical Omron Tateisi Electronics Co
Priority to JP15717978A priority Critical patent/JPS5582303A/en
Publication of JPS5582303A publication Critical patent/JPS5582303A/en
Publication of JPS627563B2 publication Critical patent/JPS627563B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Testing And Monitoring For Control Systems (AREA)
  • Programmable Controllers (AREA)

Abstract

PURPOSE:To perform write, check, etc., of a program efficiently by generating alarm in case of an erroneous key operation in a stepping sequence controller where the program is inputted by key operations. CONSTITUTION:In write of a program for external load control, a CPU reads a program for write of internal control from a ROM and scans switching states of external input terminals IN1-INn, console switch CS, switch S2, etc., and key group 1 and discriminates program write or execution on a basis of the state of an internal input circuit. When the input state becomes program write, instructions set by key group 1 are written into memory M successively. The CPU displays contents of program steps on display parts 2, 3, 51-54. In case of an erroneous operation, memory M and display parts are not changed from states before the erroneous operation through a driving signal is outputted from the CPU to buzzer BZ. Consequently, the erroneous operation can be found to perform a correct operation, and write, etc., of the program efficiently.
JP15717978A 1978-12-18 1978-12-18 Sequence controller Granted JPS5582303A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15717978A JPS5582303A (en) 1978-12-18 1978-12-18 Sequence controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15717978A JPS5582303A (en) 1978-12-18 1978-12-18 Sequence controller

Publications (2)

Publication Number Publication Date
JPS5582303A true JPS5582303A (en) 1980-06-21
JPS627563B2 JPS627563B2 (en) 1987-02-18

Family

ID=15643904

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15717978A Granted JPS5582303A (en) 1978-12-18 1978-12-18 Sequence controller

Country Status (1)

Country Link
JP (1) JPS5582303A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS582909A (en) * 1981-06-29 1983-01-08 Fujitsu Ltd Erroneous set display system for operation system
JPS60147808A (en) * 1984-01-13 1985-08-03 Mitsubishi Electric Corp Numerical controller

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01173085U (en) * 1988-05-30 1989-12-07

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS582909A (en) * 1981-06-29 1983-01-08 Fujitsu Ltd Erroneous set display system for operation system
JPH0361202B2 (en) * 1981-06-29 1991-09-19 Fujitsu Ltd
JPS60147808A (en) * 1984-01-13 1985-08-03 Mitsubishi Electric Corp Numerical controller

Also Published As

Publication number Publication date
JPS627563B2 (en) 1987-02-18

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