JPS5578612A - Semiconductor integrated circuit - Google Patents
Semiconductor integrated circuitInfo
- Publication number
- JPS5578612A JPS5578612A JP15255278A JP15255278A JPS5578612A JP S5578612 A JPS5578612 A JP S5578612A JP 15255278 A JP15255278 A JP 15255278A JP 15255278 A JP15255278 A JP 15255278A JP S5578612 A JPS5578612 A JP S5578612A
- Authority
- JP
- Japan
- Prior art keywords
- transistors
- emitter
- base
- differential circuit
- bias
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
Abstract
PURPOSE:To secure application of the DC bias while keeping a low impedance for the input end featuring the AC-type connection of the differential circuit consisting of the 1st and 2nd transistors by providing the emitter follower comprising the 3rd and 4th transistors to the differential circuit. CONSTITUTION:The emitters of 1st and 2nd transistors Q1 and Q2 are connected in common to be connected to constant current source I, and the collectors are connected to power source VCC via load resistances R1 and R2 each. Thus the differential circuit is formed. Then the emitter follower consisting of 3rd and 4th transistors Q4 and Q5 in which the base and collector are shared is provided to apply the bias to the differential circuit. And resistances R12 and R13 are connected to each emitter, and the bias is applied to the base via rsistances R8 and R9. At the same time, the base of transistor Q1 to function as signal input end IN is connected to the emitter of Q4 via coupling resistance R10, and the base of Q2 is connected directly to the emitter of Q5. In such way, the circuit is intergrated into one sheet of the semiconductor wafer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15255278A JPS5578612A (en) | 1978-12-09 | 1978-12-09 | Semiconductor integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15255278A JPS5578612A (en) | 1978-12-09 | 1978-12-09 | Semiconductor integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5578612A true JPS5578612A (en) | 1980-06-13 |
Family
ID=15542951
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15255278A Pending JPS5578612A (en) | 1978-12-09 | 1978-12-09 | Semiconductor integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5578612A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4587444A (en) * | 1982-07-13 | 1986-05-06 | Fujitsu Limited | Variable-threshold-type differential signal receiver |
JPS61200710A (en) * | 1985-03-01 | 1986-09-05 | Toshiba Corp | Differential amplifier |
US4972159A (en) * | 1988-08-29 | 1990-11-20 | Sharp Kabushiki Kaisha | Amplifier circuit more immune to fluctuation of reference voltage |
-
1978
- 1978-12-09 JP JP15255278A patent/JPS5578612A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4587444A (en) * | 1982-07-13 | 1986-05-06 | Fujitsu Limited | Variable-threshold-type differential signal receiver |
JPS61200710A (en) * | 1985-03-01 | 1986-09-05 | Toshiba Corp | Differential amplifier |
US4972159A (en) * | 1988-08-29 | 1990-11-20 | Sharp Kabushiki Kaisha | Amplifier circuit more immune to fluctuation of reference voltage |
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