JPS5554478A - Comparing test method - Google Patents

Comparing test method

Info

Publication number
JPS5554478A
JPS5554478A JP12881978A JP12881978A JPS5554478A JP S5554478 A JPS5554478 A JP S5554478A JP 12881978 A JP12881978 A JP 12881978A JP 12881978 A JP12881978 A JP 12881978A JP S5554478 A JPS5554478 A JP S5554478A
Authority
JP
Japan
Prior art keywords
output
outputs
difference
tested
test signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12881978A
Other languages
Japanese (ja)
Inventor
Yuzuru Azuma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP12881978A priority Critical patent/JPS5554478A/en
Publication of JPS5554478A publication Critical patent/JPS5554478A/en
Pending legal-status Critical Current

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  • Tests Of Electronic Circuits (AREA)

Abstract

PURPOSE: To make synthetic tests of a complex input by making a decision on quality by using an integral value relating to the time of a difference between the output amplitude of a standard element and that of an element to be tested.
CONSTITUTION: When a test signal from test signal generator 1 is applied to standard element SD (or standard circuit) 2 and tested element DUT (or tested circuit) 3 at the same time, the output of differential amplifier 4 in proportion to the abslolute value of a difference between outputs of SD2 and DUT3 is inputted to voltage- current converter 5. The output of voltage-current converter 5 is integrated by integrator 6 as long as the period of the test signal and this integrator 6 outputs the level of the difference between outputs of SD2 and DUT3 and a signal in proportion to area formed by the time; and this output level is compared with the reference level from reference level generator 7 by comparator 8 to make a decision on the quality.
COPYRIGHT: (C)1980,JPO&Japio
JP12881978A 1978-10-17 1978-10-17 Comparing test method Pending JPS5554478A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12881978A JPS5554478A (en) 1978-10-17 1978-10-17 Comparing test method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12881978A JPS5554478A (en) 1978-10-17 1978-10-17 Comparing test method

Publications (1)

Publication Number Publication Date
JPS5554478A true JPS5554478A (en) 1980-04-21

Family

ID=14994191

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12881978A Pending JPS5554478A (en) 1978-10-17 1978-10-17 Comparing test method

Country Status (1)

Country Link
JP (1) JPS5554478A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60173482A (en) * 1984-02-20 1985-09-06 Matsushita Electric Ind Co Ltd Inspecting device for abnormal waveform
DE102004010783A1 (en) * 2004-03-05 2005-09-29 Infineon Technologies Ag Method and circuit arrangement for testing electrical components
KR100883500B1 (en) * 2007-01-05 2009-02-16 베리지 (싱가포르) 피티이. 엘티디. Evaluation of an output signal of a device under test

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60173482A (en) * 1984-02-20 1985-09-06 Matsushita Electric Ind Co Ltd Inspecting device for abnormal waveform
DE102004010783A1 (en) * 2004-03-05 2005-09-29 Infineon Technologies Ag Method and circuit arrangement for testing electrical components
US7325182B2 (en) 2004-03-05 2008-01-29 Infineon Technologies Ag Method and circuit arrangement for testing electrical modules
KR100883500B1 (en) * 2007-01-05 2009-02-16 베리지 (싱가포르) 피티이. 엘티디. Evaluation of an output signal of a device under test

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