JPS5552256A - Semicondutor memory - Google Patents

Semicondutor memory

Info

Publication number
JPS5552256A
JPS5552256A JP12557378A JP12557378A JPS5552256A JP S5552256 A JPS5552256 A JP S5552256A JP 12557378 A JP12557378 A JP 12557378A JP 12557378 A JP12557378 A JP 12557378A JP S5552256 A JPS5552256 A JP S5552256A
Authority
JP
Japan
Prior art keywords
type
base
bases
transistors
adjoining
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12557378A
Other languages
Japanese (ja)
Inventor
Yoshinobu Natsui
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP12557378A priority Critical patent/JPS5552256A/en
Publication of JPS5552256A publication Critical patent/JPS5552256A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Abstract

PURPOSE:To restrict parasitic thyristor effect thereby securing memory by providing a high-impurity region whose conductive direction is the opposite to a base of P- ROM that is made by shortcircuiting due to a selective destruction of a base-emitter junction in a bipolar transistor. CONSTITUTION:Two or more P-type bases are formed in an N-type epitaxial layer 3 being provided on a P-type semiconductor substrate 1, then an N-type emitter is formed in each base to compose two or more NPN transistors which share the N- type layer 3 as a common collector. A P-type separation region 4 separates a transistor used for a peripheral circuit E1-B1-C1 from transistors used for memory elements. Then an N-type high-impurity channel stopper 5 is installed on the N-type collector between the adjoining two P-type bases B2, B3 of the transistors used for memory elements E2-B2-C1, E3-B3-C2. By so doing, current increase rate between the two adjoining bases in parasitic lateral transistors is reduced, thereby preventing the parasitic thyristor effect.
JP12557378A 1978-10-11 1978-10-11 Semicondutor memory Pending JPS5552256A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12557378A JPS5552256A (en) 1978-10-11 1978-10-11 Semicondutor memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12557378A JPS5552256A (en) 1978-10-11 1978-10-11 Semicondutor memory

Publications (1)

Publication Number Publication Date
JPS5552256A true JPS5552256A (en) 1980-04-16

Family

ID=14913520

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12557378A Pending JPS5552256A (en) 1978-10-11 1978-10-11 Semicondutor memory

Country Status (1)

Country Link
JP (1) JPS5552256A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0072209A2 (en) * 1981-08-08 1983-02-16 Fujitsu Limited Junction short-circuiting-type programmable read-only memory device
US5661047A (en) * 1994-10-05 1997-08-26 United Microelectronics Corporation Method for forming bipolar ROM device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5375786A (en) * 1976-12-17 1978-07-05 Fujitsu Ltd Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5375786A (en) * 1976-12-17 1978-07-05 Fujitsu Ltd Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0072209A2 (en) * 1981-08-08 1983-02-16 Fujitsu Limited Junction short-circuiting-type programmable read-only memory device
US5661047A (en) * 1994-10-05 1997-08-26 United Microelectronics Corporation Method for forming bipolar ROM device

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