JPS5544219A - Correction system for delay amount - Google Patents

Correction system for delay amount

Info

Publication number
JPS5544219A
JPS5544219A JP11596778A JP11596778A JPS5544219A JP S5544219 A JPS5544219 A JP S5544219A JP 11596778 A JP11596778 A JP 11596778A JP 11596778 A JP11596778 A JP 11596778A JP S5544219 A JPS5544219 A JP S5544219A
Authority
JP
Japan
Prior art keywords
frames
delay
frame
switch
highway
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11596778A
Other languages
English (en)
Other versions
JPS589639B2 (ja
Inventor
Tatsuro Miyoshi
Atsushi Hirai
Chukichi Ono
Noboru Watanabe
Tsuneo Katsuyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Hitachi Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP11596778A priority Critical patent/JPS589639B2/ja
Publication of JPS5544219A publication Critical patent/JPS5544219A/ja
Publication of JPS589639B2 publication Critical patent/JPS589639B2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/04Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
JP11596778A 1978-09-22 1978-09-22 遅延量補正方式 Expired JPS589639B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11596778A JPS589639B2 (ja) 1978-09-22 1978-09-22 遅延量補正方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11596778A JPS589639B2 (ja) 1978-09-22 1978-09-22 遅延量補正方式

Publications (2)

Publication Number Publication Date
JPS5544219A true JPS5544219A (en) 1980-03-28
JPS589639B2 JPS589639B2 (ja) 1983-02-22

Family

ID=14675561

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11596778A Expired JPS589639B2 (ja) 1978-09-22 1978-09-22 遅延量補正方式

Country Status (1)

Country Link
JP (1) JPS589639B2 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60229453A (ja) * 1984-04-02 1985-11-14 コンパニー・アンデユストリエル・デ・テレコミユニカシオン・セイテ‐アルカテル 高速選択信号のための空間接続回線網
JPS6387899A (ja) * 1986-09-30 1988-04-19 Nec Corp 時分割交換機におけるフレ−ム位相同期方式

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60229453A (ja) * 1984-04-02 1985-11-14 コンパニー・アンデユストリエル・デ・テレコミユニカシオン・セイテ‐アルカテル 高速選択信号のための空間接続回線網
JPS6387899A (ja) * 1986-09-30 1988-04-19 Nec Corp 時分割交換機におけるフレ−ム位相同期方式

Also Published As

Publication number Publication date
JPS589639B2 (ja) 1983-02-22

Similar Documents

Publication Publication Date Title
EP0445574A3 (en) Digital clock buffer circuit providing controllable delay
ES8304733A1 (es) Procedimiento para la emision en tiempo sincrono de informaciones por varias emisoras de onda sincronizada.
JPS5544219A (en) Correction system for delay amount
JPS5410601A (en) Representative address control system for loop communication system
JPS5429642A (en) Controlling system by multimicrocomputer system of copying machines
JPS5381059A (en) Digital phase synchronizing system
JPS5470742A (en) Data bus control system
JPS54110716A (en) Signal synchronous system
JPS5528125A (en) Input and output control unit
JPS52113146A (en) Synchronous system
JPS57108911A (en) Clock signal control system
JPS53108307A (en) Control system for time-division channel
JPS5623060A (en) Switching system of external timing signal
JPS52117503A (en) Time division telephone exchange system
JPS5255404A (en) Memory switch type time division circuit exchange system
JPS525202A (en) Data transmission
JPS53139411A (en) Time division exchange control system
JPS53116007A (en) Data transfer system in competition
JPS52120603A (en) Communicating path control system
JPS5496915A (en) Stuff multiple-synchronous multiple connection converter
JPS5789355A (en) Communication system for loop communication network
JPS5360502A (en) Adaptive frame synchronizing system
JPS51150931A (en) Priority order setting unit
JPS5440021A (en) Multi-port system
JPS545305A (en) Multiplex data transmission system of ring shape cyclic type