JPS5623060A - Switching system of external timing signal - Google Patents

Switching system of external timing signal

Info

Publication number
JPS5623060A
JPS5623060A JP9863979A JP9863979A JPS5623060A JP S5623060 A JPS5623060 A JP S5623060A JP 9863979 A JP9863979 A JP 9863979A JP 9863979 A JP9863979 A JP 9863979A JP S5623060 A JPS5623060 A JP S5623060A
Authority
JP
Japan
Prior art keywords
timing signal
output
switching
priority
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9863979A
Other languages
Japanese (ja)
Inventor
Takashi Sugimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP9863979A priority Critical patent/JPS5623060A/en
Publication of JPS5623060A publication Critical patent/JPS5623060A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Communication Control (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To automatically select the timing signal from the terminal unit in the next order and to relieve failures, by giving priority of switching for the external timing signal, for the stop of timing signal with failures in the terminal unit with priority. CONSTITUTION:The terminal units of N sets (where N>=2) are made to receive and give the data of multi-port via the modulation and demodulation unit providing the multiplex function and this multiplex channel is taken as 4-channels. Further, the external timing signals T1-T4 with priority of switching in advance are fed to the external timing signal input terminals 1-4, and the clock pulse C is fed to the common clock pulse input terminal 8. This timing switching circuit is provided with the switching control circuits 5-7 controlling the switching circuits 9-11 according to the priority, the 1st and 2nd signals T1, T2 are selected with the output of the signal T1 fed to the circuit 5 at the first step to output from the circuit 9. Similarly, the output selected at the pre-stage and the signals T3, T4 are selected at the circuits 10, 11 to output them from the output terminal 12.
JP9863979A 1979-08-03 1979-08-03 Switching system of external timing signal Pending JPS5623060A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9863979A JPS5623060A (en) 1979-08-03 1979-08-03 Switching system of external timing signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9863979A JPS5623060A (en) 1979-08-03 1979-08-03 Switching system of external timing signal

Publications (1)

Publication Number Publication Date
JPS5623060A true JPS5623060A (en) 1981-03-04

Family

ID=14225071

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9863979A Pending JPS5623060A (en) 1979-08-03 1979-08-03 Switching system of external timing signal

Country Status (1)

Country Link
JP (1) JPS5623060A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61256054A (en) * 1985-05-08 1986-11-13 Aisin Warner Ltd Control device of transmission for vehicle

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61256054A (en) * 1985-05-08 1986-11-13 Aisin Warner Ltd Control device of transmission for vehicle

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