JPS57111715A - Clock switching system - Google Patents
Clock switching systemInfo
- Publication number
- JPS57111715A JPS57111715A JP18786080A JP18786080A JPS57111715A JP S57111715 A JPS57111715 A JP S57111715A JP 18786080 A JP18786080 A JP 18786080A JP 18786080 A JP18786080 A JP 18786080A JP S57111715 A JPS57111715 A JP S57111715A
- Authority
- JP
- Japan
- Prior art keywords
- clock
- circuits
- switching
- signal
- clock switching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Exchange Systems With Centralized Control (AREA)
Abstract
PURPOSE:To secure the continuity of clock pulses and form a clear signal before the clock is switched and facilitate reconstituting the system, by providing a clock switching control circuit where phases of clock pulses before switching and after switching are made continuous by an SR type FF circuit. CONSTITUTION:A data processing device for electronic exchange or the like of the dual constitution consists of a system CC0 and a system CC1, and systems CC0 and CC1 are provided with clock switching control circuits 12a and 12b, clock switching signal circuits 11a and 11b, and clock supplying circuits 5a and 5b having switching circuits 8a and 8b respectively. Circuits 12a and 12b are provided with SR type FF circuits to generate a clear signal, which clears a prescribed circuit of the data processing device, and a clock switching signal when the clock switching instruction is received. The clock switching signal is generated during the transmission of the clear signal, and clocks are switched by this switching signal, thus securing a continuous operation of the data processing device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18786080A JPS57111715A (en) | 1980-12-29 | 1980-12-29 | Clock switching system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18786080A JPS57111715A (en) | 1980-12-29 | 1980-12-29 | Clock switching system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57111715A true JPS57111715A (en) | 1982-07-12 |
Family
ID=16213474
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18786080A Pending JPS57111715A (en) | 1980-12-29 | 1980-12-29 | Clock switching system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57111715A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6010830A (en) * | 1983-06-29 | 1985-01-21 | Fujitsu Ltd | System switching system |
JPS6095623A (en) * | 1983-10-31 | 1985-05-29 | Hitachi Ltd | Information processing system |
-
1980
- 1980-12-29 JP JP18786080A patent/JPS57111715A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6010830A (en) * | 1983-06-29 | 1985-01-21 | Fujitsu Ltd | System switching system |
JPH034145B2 (en) * | 1983-06-29 | 1991-01-22 | Fujitsu Ltd | |
JPS6095623A (en) * | 1983-10-31 | 1985-05-29 | Hitachi Ltd | Information processing system |
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