JPS5542427A - Phase branching filter - Google Patents

Phase branching filter

Info

Publication number
JPS5542427A
JPS5542427A JP11527478A JP11527478A JPS5542427A JP S5542427 A JPS5542427 A JP S5542427A JP 11527478 A JP11527478 A JP 11527478A JP 11527478 A JP11527478 A JP 11527478A JP S5542427 A JPS5542427 A JP S5542427A
Authority
JP
Japan
Prior art keywords
featuring
frequency
phase difference
signal
wave
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11527478A
Other languages
Japanese (ja)
Inventor
Yukio Murayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP11527478A priority Critical patent/JPS5542427A/en
Publication of JPS5542427A publication Critical patent/JPS5542427A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/18—Networks for phase shifting
    • H03H7/21—Networks for phase shifting providing two or more phase shifted output signals, e.g. n-phase output

Landscapes

  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To realize generation of the double signal wave featuring an accurate phase relation over a wide range and with a simple constitution by branching the 4-multiplied input signal into the double-multiplied wave featuring the 180 deg. phase difference and furthermore into the square wave of the input frequency featuring the 90 deg. phase difference. CONSTITUTION:The sine wave signal of frequency f applied to terminal 1 receives 4-multiplication 2 and then sent to level converter 3 to deliver frequency 4f featuring the sudden rise. Thus the two rectangular waves of frequency 2f featuring the 180 deg. phase difference are generated from terminals Q1 and Q2 via FF4. Then the square wave signal of 2-divided frequency f featuring the 90 deg. phase difference each is delivered at FF5 and 6 to be then delivered 10 via level converters 7 and 8. Thus the two signals featuring an accurate phase relation can be generated over a wide range and through a simple constitution.
JP11527478A 1978-09-20 1978-09-20 Phase branching filter Pending JPS5542427A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11527478A JPS5542427A (en) 1978-09-20 1978-09-20 Phase branching filter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11527478A JPS5542427A (en) 1978-09-20 1978-09-20 Phase branching filter

Publications (1)

Publication Number Publication Date
JPS5542427A true JPS5542427A (en) 1980-03-25

Family

ID=14658595

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11527478A Pending JPS5542427A (en) 1978-09-20 1978-09-20 Phase branching filter

Country Status (1)

Country Link
JP (1) JPS5542427A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10211909A1 (en) * 2002-03-18 2003-10-16 Infineon Technologies Ag Circuit for generating clock signals for phase locked loops compares signals at reference signal input and second end of second delay path, outputs second clock signal depending on comparison

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10211909A1 (en) * 2002-03-18 2003-10-16 Infineon Technologies Ag Circuit for generating clock signals for phase locked loops compares signals at reference signal input and second end of second delay path, outputs second clock signal depending on comparison
DE10211909B4 (en) * 2002-03-18 2004-09-02 Infineon Technologies Ag Circuit for generating a first and a second clock signal

Similar Documents

Publication Publication Date Title
JPS54116860A (en) Variable power distributor
JPS5679504A (en) Frequency converter
JPS5279862A (en) Phase synchronous device
JPS56143703A (en) Frequency converting circuit
JPS5542427A (en) Phase branching filter
JPS5573105A (en) Elastic surface wave oscillator
JPS55134507A (en) Frequency converter
JPS5513512A (en) Frequency converter
JPS5558605A (en) Fm-am conversion unit
JPS57112108A (en) Frequency converter
JPS57124908A (en) Mic frequency multiplier
JPS532060A (en) High harmonic generator
JPS5725705A (en) Antenna having asymmetrical rotary radial beam
JPS5556716A (en) Elastic surface wave device
JPS5324653A (en) High-frequency heating device
JPS5573107A (en) Fm signal generator
JPS54100211A (en) Active 2-4 line converter circuit
JPS54148576A (en) Frequency calibrator
JPS5531301A (en) Power distributor circuit
JPS54143044A (en) Power distributor/synthesizer
JPS5635507A (en) Double balanced frequency transducer
JPS57204616A (en) Filter circuit
JPS55143849A (en) Frequency converting unit
JPS57196610A (en) Amplitude suppressing circuit
GRIFFIN Solid state array studies relevant to OTP regulations. Part 1: Evaluation of amplitude and phase characteristic of microwave solid state amplifier[Interim Report, Sep. 1974- Feb. 1976]