JPS554124A - Fs-wave demodulator - Google Patents
Fs-wave demodulatorInfo
- Publication number
- JPS554124A JPS554124A JP7683778A JP7683778A JPS554124A JP S554124 A JPS554124 A JP S554124A JP 7683778 A JP7683778 A JP 7683778A JP 7683778 A JP7683778 A JP 7683778A JP S554124 A JPS554124 A JP S554124A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- output
- circuits
- outputs
- constitution
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
- H04L27/14—Demodulator circuits; Receiver circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
PURPOSE:To assure stable characteristics over a wide temperature range by a miniature and non-adjusting constitution by connecting the 1st and 2nd output terminal of a counter circuit to the negative input terminals of the 1st and 2nd AND circuits and by leading the output and inversion output of a timing detection circuit to other-side inputs of the AND circuits. CONSTITUTION:Phase comparator circuit 15 compares a FS input signal with an negative input in terms of phase and clock frequency change-over circuit 16 varies the clock frequency of counter circuit 17 by the output of circuit 15. Then, timing detection circuit 20 is equipped which supplies the 1st and 2nd outputs to the negative input terminals of AND circuits 18 and 19 when a preset number of different clocks are inputted to circuit 17 and then outputs the inversion output of circuit 15 at the timing of the outputs of circuits 18 and 19, and the output and inversion output of this circuit 20 are applied to other-side input terminals of circuits 18 and 19. Consequently, a non-adjusting and miniature constitution can be realized with stable characteristics assured over a wide temperature range.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7683778A JPS554124A (en) | 1978-06-23 | 1978-06-23 | Fs-wave demodulator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7683778A JPS554124A (en) | 1978-06-23 | 1978-06-23 | Fs-wave demodulator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS554124A true JPS554124A (en) | 1980-01-12 |
Family
ID=13616778
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7683778A Pending JPS554124A (en) | 1978-06-23 | 1978-06-23 | Fs-wave demodulator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS554124A (en) |
-
1978
- 1978-06-23 JP JP7683778A patent/JPS554124A/en active Pending
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