JPS5527764A - Logic circuit - Google Patents

Logic circuit

Info

Publication number
JPS5527764A
JPS5527764A JP10094878A JP10094878A JPS5527764A JP S5527764 A JPS5527764 A JP S5527764A JP 10094878 A JP10094878 A JP 10094878A JP 10094878 A JP10094878 A JP 10094878A JP S5527764 A JPS5527764 A JP S5527764A
Authority
JP
Japan
Prior art keywords
transistors
collector
base
transistor
logic circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10094878A
Other languages
Japanese (ja)
Inventor
Kazuyoshi Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP10094878A priority Critical patent/JPS5527764A/en
Publication of JPS5527764A publication Critical patent/JPS5527764A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/086—Emitter coupled logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To facilitate easy relaization of a high speed and low logic amplitude for the logic circuit consisting of several units of transistors to which the collector is connected in common, by connecting the saturation preventing clamp diode between the collector and the base of each transistor. CONSTITUTION:Input IN1, IN2-INn are applied to each base of transistors Qr10, Qr20-Qrn0; while reference voltage Vref is applied to each base of transistors Qr11 plus Qr21-Qrn1. Then constant current sources I1-In are connected to these transistors to form the logic circuit. In such constitution, the collector dotting is carried out by resistance RCO plus transistors Qr11 Qrn1, and furthermore transistor saturation preventing clamp diode Dc1-Dcn are connected the collector and the base of each transistor. In this case, the forward voltage must be smaller than the base-collector voltage of the transistor.
JP10094878A 1978-08-21 1978-08-21 Logic circuit Pending JPS5527764A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10094878A JPS5527764A (en) 1978-08-21 1978-08-21 Logic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10094878A JPS5527764A (en) 1978-08-21 1978-08-21 Logic circuit

Publications (1)

Publication Number Publication Date
JPS5527764A true JPS5527764A (en) 1980-02-28

Family

ID=14287564

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10094878A Pending JPS5527764A (en) 1978-08-21 1978-08-21 Logic circuit

Country Status (1)

Country Link
JP (1) JPS5527764A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6077118U (en) * 1983-10-28 1985-05-29 東光株式会社 transistor amplifier circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6077118U (en) * 1983-10-28 1985-05-29 東光株式会社 transistor amplifier circuit
JPH03746Y2 (en) * 1983-10-28 1991-01-11

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