JPS5527681A - Field effect transistor - Google Patents

Field effect transistor

Info

Publication number
JPS5527681A
JPS5527681A JP10132078A JP10132078A JPS5527681A JP S5527681 A JPS5527681 A JP S5527681A JP 10132078 A JP10132078 A JP 10132078A JP 10132078 A JP10132078 A JP 10132078A JP S5527681 A JPS5527681 A JP S5527681A
Authority
JP
Japan
Prior art keywords
layer
gate region
mosfet
layer gate
field effect
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10132078A
Other languages
Japanese (ja)
Inventor
Kanichi Harima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP10132078A priority Critical patent/JPS5527681A/en
Publication of JPS5527681A publication Critical patent/JPS5527681A/en
Pending legal-status Critical Current

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  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE: To provide a FET that has an orientation by means of a MOSFET which has a double layer structure by forming the first layer gate region and the second layer gate region in an insulation layer that stretches over the pair of regions.
CONSTITUTION: The first layer gate region 18 is connected to a source region 12 or a drain region 13, while the second layer gate region 19 is placed above the first layer gate region 18 so that they are as if one layer of MOSFET and another layer of MOSFET are connected in parallel. As a result, a single element gives characteristics usually obtained by two MOSFET's.
COPYRIGHT: (C)1980,JPO&Japio
JP10132078A 1978-08-19 1978-08-19 Field effect transistor Pending JPS5527681A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10132078A JPS5527681A (en) 1978-08-19 1978-08-19 Field effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10132078A JPS5527681A (en) 1978-08-19 1978-08-19 Field effect transistor

Publications (1)

Publication Number Publication Date
JPS5527681A true JPS5527681A (en) 1980-02-27

Family

ID=14297509

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10132078A Pending JPS5527681A (en) 1978-08-19 1978-08-19 Field effect transistor

Country Status (1)

Country Link
JP (1) JPS5527681A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58163012A (en) * 1982-03-23 1983-09-27 Hitachi Ltd Controller of process computer
US5172199A (en) * 1990-06-25 1992-12-15 Sharp Kabushiki Kaisha Compact nonvolatile semiconductor memory device using stacked active and passive elements

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5239354A (en) * 1975-09-23 1977-03-26 Toshiba Corp Drive circuit
JPS52115668A (en) * 1976-03-25 1977-09-28 Sony Corp Field effect transistor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5239354A (en) * 1975-09-23 1977-03-26 Toshiba Corp Drive circuit
JPS52115668A (en) * 1976-03-25 1977-09-28 Sony Corp Field effect transistor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58163012A (en) * 1982-03-23 1983-09-27 Hitachi Ltd Controller of process computer
US5172199A (en) * 1990-06-25 1992-12-15 Sharp Kabushiki Kaisha Compact nonvolatile semiconductor memory device using stacked active and passive elements

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