JPS55166331A - Digital phase variable circuit - Google Patents

Digital phase variable circuit

Info

Publication number
JPS55166331A
JPS55166331A JP7412979A JP7412979A JPS55166331A JP S55166331 A JPS55166331 A JP S55166331A JP 7412979 A JP7412979 A JP 7412979A JP 7412979 A JP7412979 A JP 7412979A JP S55166331 A JPS55166331 A JP S55166331A
Authority
JP
Japan
Prior art keywords
pulse
control
circuit
receives
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7412979A
Other languages
Japanese (ja)
Other versions
JPS6412414B2 (en
Inventor
Ichiro Takase
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP7412979A priority Critical patent/JPS55166331A/en
Publication of JPS55166331A publication Critical patent/JPS55166331A/en
Publication of JPS6412414B2 publication Critical patent/JPS6412414B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/131—Digitally controlled

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Pulse Circuits (AREA)

Abstract

PURPOSE:To secure the steady phase variation without having the large-scale circuit but by realizing such circuit constitution in that the 2<m>-types of phase states may be secured by giving the control to the m-units of control lines. CONSTITUTION:The pulse signal supplied to input terminal 201 enters synchronous counter 202 to generate pulses (a)-(d) received the 1/2-, 1/4-, 1/8-, and 1/16- division each at each output step. Here latch circuit 203 which supplies pulse (a) receives the 90 deg.-delay via latch pulse (b), and the output signal of latch circuit 204 which supplies the signal receives the 45 deg.-delay via latch pulse (c). And the output signal of latch circuit 205 receives 22.5 deg.-delay via latch pulse (d) and is then delivered to terminal 210. The above actions are done in the state under which the logic levels are all 0 for control lines CONT. 1-3 of input terminal 209 and the output of each counter step gives conduction to all OR circuits 206-208. Then if the control is given to three control lines of terminal 209 with the control signals, the eight types of phase states can be obtained.
JP7412979A 1979-06-12 1979-06-12 Digital phase variable circuit Granted JPS55166331A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7412979A JPS55166331A (en) 1979-06-12 1979-06-12 Digital phase variable circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7412979A JPS55166331A (en) 1979-06-12 1979-06-12 Digital phase variable circuit

Publications (2)

Publication Number Publication Date
JPS55166331A true JPS55166331A (en) 1980-12-25
JPS6412414B2 JPS6412414B2 (en) 1989-02-28

Family

ID=13538265

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7412979A Granted JPS55166331A (en) 1979-06-12 1979-06-12 Digital phase variable circuit

Country Status (1)

Country Link
JP (1) JPS55166331A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6081147A (en) * 1994-09-29 2000-06-27 Fujitsu Limited Timing controller and controlled delay circuit for controlling timing or delay time of a signal by changing phase thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5050851A (en) * 1973-09-04 1975-05-07
JPS5428559A (en) * 1977-08-08 1979-03-03 Nec Corp Signal delay device
JPS5696160A (en) * 1979-10-11 1981-08-04 Kei Geiroodo Jieemusu Igniter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5050851A (en) * 1973-09-04 1975-05-07
JPS5428559A (en) * 1977-08-08 1979-03-03 Nec Corp Signal delay device
JPS5696160A (en) * 1979-10-11 1981-08-04 Kei Geiroodo Jieemusu Igniter

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6081147A (en) * 1994-09-29 2000-06-27 Fujitsu Limited Timing controller and controlled delay circuit for controlling timing or delay time of a signal by changing phase thereof
US6333657B1 (en) 1994-09-29 2001-12-25 Fujitsu Limited Timing controller and controlled delay circuit for controlling timing or delay time of a signal by changing phase thereof
US6420922B1 (en) 1994-09-29 2002-07-16 Fujitsu Limited Timing controller and controlled delay circuit for controlling timing or delay time of a signal by changing phase thereof
US7119595B2 (en) 1994-09-29 2006-10-10 Fujitsu Limited Timing controller and controlled delay circuit for controlling timing or delay time of a signal by changing phase thereof
US7368967B2 (en) 1994-09-29 2008-05-06 Fujitsu Limited Timing controller and controlled delay circuit for controlling timing or delay time of a signal by changing phase thereof
US7633326B2 (en) 1994-09-29 2009-12-15 Fujitsu Microelectronics Limited Timing controller and controlled delay circuit for controlling timing or delay time of a signal by changing phase thereof

Also Published As

Publication number Publication date
JPS6412414B2 (en) 1989-02-28

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