JPS55156338A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS55156338A
JPS55156338A JP6396579A JP6396579A JPS55156338A JP S55156338 A JPS55156338 A JP S55156338A JP 6396579 A JP6396579 A JP 6396579A JP 6396579 A JP6396579 A JP 6396579A JP S55156338 A JPS55156338 A JP S55156338A
Authority
JP
Japan
Prior art keywords
pairs
opened terminals
paired
holes
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6396579A
Other languages
Japanese (ja)
Inventor
Kenichi Ono
Toru Hosomizu
Rokutaro Ogawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6396579A priority Critical patent/JPS55156338A/en
Priority to DE8080301734T priority patent/DE3066941D1/en
Priority to EP80301734A priority patent/EP0020116B1/en
Publication of JPS55156338A publication Critical patent/JPS55156338A/en
Priority to US06/378,046 priority patent/US4500906A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To simplify power supply or its suspension to the circuit by an arrangement wherein a group of wirings constituting the basic circuit on the substrate is formed into pairs of opened terminals except for a part of the wirings connecting the power supply source among them and paired through-holes in connection with the pairs of opened terminals, respectively, are provided in the insulation layer on the substrate. CONSTITUTION:In an IC comprising transistors Q1-Q4, resistors R1-R4 and others, a group of wirings constituting its basic circuits are formed into pairs of opened terminals except for at least a part of the wirings connecting a power supply source among them. In an insulation layer formed on the substrate, there are bored paired through-holes in connection with the pairs of opened terminals, respectively. The power supply source is connected with circuits under service and disconnected with circuits under nonservice among a number of basic circuits, thereby saving the amount of consumed power. In other words, a circuit shown in the drawing includes three pairs of opened terminals and paired through-holes 11-11', 12-12'and 13-13' corresponding to the respective pairs of opened terminals, and these paired opened terminals and thrugh-holes are connected to each other by the use of pattern conductors 16-19 as required.
JP6396579A 1979-05-24 1979-05-25 Semiconductor integrated circuit device Pending JPS55156338A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP6396579A JPS55156338A (en) 1979-05-25 1979-05-25 Semiconductor integrated circuit device
DE8080301734T DE3066941D1 (en) 1979-05-24 1980-05-23 Masterslice semiconductor device and method of producing it
EP80301734A EP0020116B1 (en) 1979-05-24 1980-05-23 Masterslice semiconductor device and method of producing it
US06/378,046 US4500906A (en) 1979-05-24 1982-05-14 Multilevel masterslice LSI with second metal level programming

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6396579A JPS55156338A (en) 1979-05-25 1979-05-25 Semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS55156338A true JPS55156338A (en) 1980-12-05

Family

ID=13244510

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6396579A Pending JPS55156338A (en) 1979-05-24 1979-05-25 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS55156338A (en)

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