JPS55145454A - Stuff control circuit - Google Patents

Stuff control circuit

Info

Publication number
JPS55145454A
JPS55145454A JP5302879A JP5302879A JPS55145454A JP S55145454 A JPS55145454 A JP S55145454A JP 5302879 A JP5302879 A JP 5302879A JP 5302879 A JP5302879 A JP 5302879A JP S55145454 A JPS55145454 A JP S55145454A
Authority
JP
Japan
Prior art keywords
oscillation frequency
clock pulse
memory
counter
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5302879A
Other languages
Japanese (ja)
Other versions
JPS6251012B2 (en
Inventor
Hideaki Morimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP5302879A priority Critical patent/JPS55145454A/en
Publication of JPS55145454A publication Critical patent/JPS55145454A/en
Publication of JPS6251012B2 publication Critical patent/JPS6251012B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/07—Synchronising arrangements using pulse stuffing for systems with different or fluctuating information rates or bit rates
    • H04J3/073—Bit stuffing, e.g. PDH

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To secure the previous oscillation for the oscillation frequency of the voltage control oscillator at the reception side at the point near the standard oscillation frequency by giving the control to the circuit which monitors the input signal frequency at the transmission side, thus reducing the time for set-up of the clock synchronism. CONSTITUTION:Clock pulse fL sampled out of the multiplexed signal is applied to n-notation ring counter 2 to generate the clock pulse which is used for writing of the multiplexed signal into buffer memory 3. And the multiplexed signal is memorized temporarily in memory 3. At the same time, the output of gate circuit 5 which prevents memory 3 from becoming empty is applied to n-notation ring counter 4 in order to generate the clock pulse for reading the data written into memory 3. Then FF1 is provided to the circuit, and reading clock pulse PR sent from counter 4 is applied to terminal C of FF1. And writing pulse PW sent from counter 2 is applied to terminal D along with the control signal, and stuff information bit signal S1 is delivered through output terminal Q to make the oscillation frequency of the voltage control oscillator of the reception side approximate to the standard oscillation frequency.
JP5302879A 1979-04-28 1979-04-28 Stuff control circuit Granted JPS55145454A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5302879A JPS55145454A (en) 1979-04-28 1979-04-28 Stuff control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5302879A JPS55145454A (en) 1979-04-28 1979-04-28 Stuff control circuit

Publications (2)

Publication Number Publication Date
JPS55145454A true JPS55145454A (en) 1980-11-13
JPS6251012B2 JPS6251012B2 (en) 1987-10-28

Family

ID=12931428

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5302879A Granted JPS55145454A (en) 1979-04-28 1979-04-28 Stuff control circuit

Country Status (1)

Country Link
JP (1) JPS55145454A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01161104U (en) * 1988-04-30 1989-11-09

Also Published As

Publication number Publication date
JPS6251012B2 (en) 1987-10-28

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