JPS55140956A - Data processor - Google Patents
Data processorInfo
- Publication number
- JPS55140956A JPS55140956A JP4666079A JP4666079A JPS55140956A JP S55140956 A JPS55140956 A JP S55140956A JP 4666079 A JP4666079 A JP 4666079A JP 4666079 A JP4666079 A JP 4666079A JP S55140956 A JPS55140956 A JP S55140956A
- Authority
- JP
- Japan
- Prior art keywords
- given
- circuit
- fault
- delivered
- check
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
PURPOSE: To realize the test of fault for both the software and the hardware by designating the type of the fault occurred in addition to designation of the order address which causes the false machine check in case the test is given to the hardware fault process mechanism.
CONSTITUTION: The value desired to be compared with the control storage address of address register 1 is set to register 2, and the comparison is given to the contents between registers 1 and 2 through comparator 7. And the coincidence signal is delivered when the coincidence is obtained through the comparison. The indication ordering to set check latches 12 and 13 is given from FFs 4W6 each at the time of delivery of the coincidence signal. The output obtained through the logic product between FF4 and FFs 5, 6 is applied to parity check circuit 11 via AND circuit 8, and the parities delivered from registers 9 and 10 are checked to be set to latches 12 and 13 each. Then the type of the fault occurred is designated in addition to the order address which causes the false machine check. And machine check signal 19 is delivered via OR circuit 14.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4666079A JPS55140956A (en) | 1979-04-18 | 1979-04-18 | Data processor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4666079A JPS55140956A (en) | 1979-04-18 | 1979-04-18 | Data processor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55140956A true JPS55140956A (en) | 1980-11-04 |
Family
ID=12753479
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4666079A Pending JPS55140956A (en) | 1979-04-18 | 1979-04-18 | Data processor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55140956A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59744A (en) * | 1982-06-28 | 1984-01-05 | Hitachi Ltd | Data processor |
JPH03184134A (en) * | 1989-12-13 | 1991-08-12 | Nec Corp | Pseudo fault generating mechanism for data processor |
-
1979
- 1979-04-18 JP JP4666079A patent/JPS55140956A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59744A (en) * | 1982-06-28 | 1984-01-05 | Hitachi Ltd | Data processor |
JPH03184134A (en) * | 1989-12-13 | 1991-08-12 | Nec Corp | Pseudo fault generating mechanism for data processor |
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