JPS54104752A - Information processing system - Google Patents

Information processing system

Info

Publication number
JPS54104752A
JPS54104752A JP1146278A JP1146278A JPS54104752A JP S54104752 A JPS54104752 A JP S54104752A JP 1146278 A JP1146278 A JP 1146278A JP 1146278 A JP1146278 A JP 1146278A JP S54104752 A JPS54104752 A JP S54104752A
Authority
JP
Japan
Prior art keywords
use rate
register
processor
signal
stored
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1146278A
Other languages
Japanese (ja)
Other versions
JPS5952467B2 (en
Inventor
Masaru Matsunaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP53011462A priority Critical patent/JPS5952467B2/en
Publication of JPS54104752A publication Critical patent/JPS54104752A/en
Publication of JPS5952467B2 publication Critical patent/JPS5952467B2/en
Expired legal-status Critical Current

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  • Hardware Redundancy (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To smooth the system processing, by measuring the using rate of the processor with the use rate monitor, causing the interruption signal if this is more than a given value and failures are taken place to the hardware, stopping the processor, and by changing over to other spare processor.
CONSTITUTION: The average use rate of the processor under operation is measured with the use rate measuring circuit 2 in the time distance designated with the time distance set register 3, and this is stored in the use rate storage register 4 with the trigger signal 11. On the other hand, the use rate register 5 is stored for the average use rate which is the reference in advance, and this is compared with the use rate of the register 4 at the comparison circuit 6. In this case, if the stored value of the register 4 is greater than that of the register 5, the signal 16 is caused and it is fed to the decision circuit 7 together with the failure generation signal 17, producing the stop and interruption signal. Thus, the processor is stopped and it is changed over to the spare unit.
COPYRIGHT: (C)1979,JPO&Japio
JP53011462A 1978-02-06 1978-02-06 information processing system Expired JPS5952467B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53011462A JPS5952467B2 (en) 1978-02-06 1978-02-06 information processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53011462A JPS5952467B2 (en) 1978-02-06 1978-02-06 information processing system

Publications (2)

Publication Number Publication Date
JPS54104752A true JPS54104752A (en) 1979-08-17
JPS5952467B2 JPS5952467B2 (en) 1984-12-19

Family

ID=11778751

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53011462A Expired JPS5952467B2 (en) 1978-02-06 1978-02-06 information processing system

Country Status (1)

Country Link
JP (1) JPS5952467B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6139895A (en) * 1984-07-30 1986-02-26 Matsushita Electric Ind Co Ltd Controller or induction motor

Also Published As

Publication number Publication date
JPS5952467B2 (en) 1984-12-19

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