JPS55140345A - Communication line switching system - Google Patents
Communication line switching systemInfo
- Publication number
- JPS55140345A JPS55140345A JP4801079A JP4801079A JPS55140345A JP S55140345 A JPS55140345 A JP S55140345A JP 4801079 A JP4801079 A JP 4801079A JP 4801079 A JP4801079 A JP 4801079A JP S55140345 A JPS55140345 A JP S55140345A
- Authority
- JP
- Japan
- Prior art keywords
- line
- circuit line
- circuit
- loop
- terminals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/42—Loop networks
- H04L12/437—Ring fault isolation or reconfiguration
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Small-Scale Networks (AREA)
Abstract
PURPOSE:To prevent the response time from a terminal from being long at a fault time, by providing two-system parallel-series signal conversion circuits in the host processor and by folding the working circuit line to the auxiliary circuit line in both sides of the faulty position at the fault time of the working circuit line. CONSTITUTION:Host processor 1 is provided with parallel-series conversion circuits 15 and 16 of the same function, and loop-form working circuit line 2 is connected to them, and terminals 4-7 are connected to this circuit line. Meanwhile, loop- form auxiliary circuit line 8 is arranged near circuit line 2. Respective terminals are connected to the circuit line through selector switches 11-14, and in processor 1, communication control circuit 17, circuits 15 and 16, and circuit lines 2 and 8 are connected through selector switches k7-k20, and k11'-k14'. In case that lines 2 as well as 8 are faulty at faulty point 9, selector switches are connected as shown by solid lines in the figure, and lines 2 and 8 are used as the going line and the returning line respectively between processor 1 and terminals 4 and 5, and terminals 6 and 7 constitute a loop-form circuit line with line 8 as the going line and line 2 as the returning line, thus shortening the loop length.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4801079A JPS55140345A (en) | 1979-04-20 | 1979-04-20 | Communication line switching system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4801079A JPS55140345A (en) | 1979-04-20 | 1979-04-20 | Communication line switching system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55140345A true JPS55140345A (en) | 1980-11-01 |
Family
ID=12791320
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4801079A Pending JPS55140345A (en) | 1979-04-20 | 1979-04-20 | Communication line switching system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55140345A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5350608A (en) * | 1976-10-20 | 1978-05-09 | Hitachi Ltd | Loop communication system |
-
1979
- 1979-04-20 JP JP4801079A patent/JPS55140345A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5350608A (en) * | 1976-10-20 | 1978-05-09 | Hitachi Ltd | Loop communication system |
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