JPS5513507A - Noise attenuation circuit of fm receiver - Google Patents

Noise attenuation circuit of fm receiver

Info

Publication number
JPS5513507A
JPS5513507A JP8502478A JP8502478A JPS5513507A JP S5513507 A JPS5513507 A JP S5513507A JP 8502478 A JP8502478 A JP 8502478A JP 8502478 A JP8502478 A JP 8502478A JP S5513507 A JPS5513507 A JP S5513507A
Authority
JP
Japan
Prior art keywords
output
detection
voltage control
frequency divider
level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8502478A
Other languages
Japanese (ja)
Other versions
JPS628977B2 (en
Inventor
Hiroki Aizawa
Junichi Shibata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Electronic Corp filed Critical Pioneer Electronic Corp
Priority to JP8502478A priority Critical patent/JPS5513507A/en
Publication of JPS5513507A publication Critical patent/JPS5513507A/en
Publication of JPS628977B2 publication Critical patent/JPS628977B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04H—BROADCAST COMMUNICATION
    • H04H40/00—Arrangements specially adapted for receiving broadcast information
    • H04H40/18—Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/36—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
    • H04H40/45—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving
    • H04H40/72—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving for noise suppression
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/16—Circuits
    • H04B1/1646—Circuits adapted for the reception of stereophonic signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Noise Elimination (AREA)
  • Stereo-Broadcasting Methods (AREA)

Abstract

PURPOSE:To prevent noise from being distinct without malfunction by taking out a detection ouput from an IF output by synchronous detection and controlling the level of sound signals by this detection output. CONSTITUTION:The electromagnetic wave received by antenna 1 becomes IF signals at front end 2 and is applied to IF amplifier 4 through band-pass filter 3. A PLL detector is constituted by phase comparator 5, low-pass filter 6, voltage control oscillator 7 and 1/2 frequency divider 9; and the double frequency of the IF frequency is oscillated by voltage control oscillator 7 at a lock time and is divided by 1/2 frequency divider 9 and is applied to phase comparator 5. The output of voltage control oscillator 7 is divided by inverter 8 and 1/2 frequency divider 10 and is applied to synchronous detector 11, and the IF output is subjected to synchronous detection to take out a detection output proportional to the input carrier level, and this detection output is applied to VCA 17 and 18 to control the level of sound signals.
JP8502478A 1978-07-14 1978-07-14 Noise attenuation circuit of fm receiver Granted JPS5513507A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8502478A JPS5513507A (en) 1978-07-14 1978-07-14 Noise attenuation circuit of fm receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8502478A JPS5513507A (en) 1978-07-14 1978-07-14 Noise attenuation circuit of fm receiver

Publications (2)

Publication Number Publication Date
JPS5513507A true JPS5513507A (en) 1980-01-30
JPS628977B2 JPS628977B2 (en) 1987-02-25

Family

ID=13847149

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8502478A Granted JPS5513507A (en) 1978-07-14 1978-07-14 Noise attenuation circuit of fm receiver

Country Status (1)

Country Link
JP (1) JPS5513507A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5854149U (en) * 1981-10-05 1983-04-13 株式会社ケンウッド FM stereo tuner
JPH07101976B2 (en) * 1984-10-12 1995-11-01 ゼネラル・エレクトリック・カンパニイ Flat rolled core

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5854149U (en) * 1981-10-05 1983-04-13 株式会社ケンウッド FM stereo tuner
JPS6244605Y2 (en) * 1981-10-05 1987-11-26
JPH07101976B2 (en) * 1984-10-12 1995-11-01 ゼネラル・エレクトリック・カンパニイ Flat rolled core

Also Published As

Publication number Publication date
JPS628977B2 (en) 1987-02-25

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