JPS55132129A - Semiconductor switch break control system - Google Patents
Semiconductor switch break control systemInfo
- Publication number
- JPS55132129A JPS55132129A JP3914479A JP3914479A JPS55132129A JP S55132129 A JPS55132129 A JP S55132129A JP 3914479 A JP3914479 A JP 3914479A JP 3914479 A JP3914479 A JP 3914479A JP S55132129 A JPS55132129 A JP S55132129A
- Authority
- JP
- Japan
- Prior art keywords
- current
- gate
- circuit
- state
- scr
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/13—Modifications for switching at zero crossing
- H03K17/136—Modifications for switching at zero crossing in thyristor switches
Landscapes
- Power Conversion In General (AREA)
- Thyristor Switches And Gates (AREA)
Abstract
PURPOSE:To make it possible to simplify circuit constitution while lessening the generation of inverse electromotive force due to inductive load control, by stopping gate drive when a signal current is inverted in polarity or at zero level. CONSTITUTION:In the circuit consisting of signal source 1, inductive load 2, semiconductor switch circuit 3, gate driving circuit 4, gate drive control circuit 5, etc., the application of an OFF control signal to control terminal CNT stops the gate drive of one SCR where no gate signal flows and also holds the other SCR in an On state by supplying the gate current in succession, so that even if a passing signal (load) current would decrease below a holding current value, the operation will be controlled to prevent on OFF state from being set immediately. Since a reverse stop state is set when the passing current value further decreases and the current direction is inverted, the other SCR is placed in the OFF state and no gate current is supplied to SCR, so that circuit 3 will be in the OFF state on the whole.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3914479A JPS6019854B2 (en) | 1979-03-30 | 1979-03-30 | Semiconductor switch cutoff control device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3914479A JPS6019854B2 (en) | 1979-03-30 | 1979-03-30 | Semiconductor switch cutoff control device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS55132129A true JPS55132129A (en) | 1980-10-14 |
JPS6019854B2 JPS6019854B2 (en) | 1985-05-18 |
Family
ID=12544903
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3914479A Expired JPS6019854B2 (en) | 1979-03-30 | 1979-03-30 | Semiconductor switch cutoff control device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6019854B2 (en) |
-
1979
- 1979-03-30 JP JP3914479A patent/JPS6019854B2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS6019854B2 (en) | 1985-05-18 |
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