JPS55125592A - Memory access system - Google Patents

Memory access system

Info

Publication number
JPS55125592A
JPS55125592A JP3145879A JP3145879A JPS55125592A JP S55125592 A JPS55125592 A JP S55125592A JP 3145879 A JP3145879 A JP 3145879A JP 3145879 A JP3145879 A JP 3145879A JP S55125592 A JPS55125592 A JP S55125592A
Authority
JP
Japan
Prior art keywords
line
stack
address
pointer
sent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3145879A
Other languages
Japanese (ja)
Inventor
Yoshiharu Kanbayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP3145879A priority Critical patent/JPS55125592A/en
Publication of JPS55125592A publication Critical patent/JPS55125592A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

PURPOSE:To facilitate an easy memory access via the program even for the control unit which has no stack control order, by actuating the part of the memory address by means of the stack function. CONSTITUTION:When the address information shows the stack flag, stack control circuit 122 adds ''1'' to stack pointer 123 in case the command of control line 130 is for writing. And then gate 124 is closed with gate 125 opened each, and the contents of pointer 123 is sent to the address line 111 in the form of the address information. And the data of data line 140 is sent to memory 101 in synchronization with the address sent to line 111. If the command of line 130 is for reading, circuit 122 closes gate 124 and opens gate 125 each to send the contents of pointer 123 to line 111. Then the contents of the corresponding address of memory 101 is read out and then sent to control unit 100 through data line 150, and then ''1'' is subtracted from pointer 123. As a result, the memory access via the program can be facilitated.
JP3145879A 1979-03-16 1979-03-16 Memory access system Pending JPS55125592A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3145879A JPS55125592A (en) 1979-03-16 1979-03-16 Memory access system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3145879A JPS55125592A (en) 1979-03-16 1979-03-16 Memory access system

Publications (1)

Publication Number Publication Date
JPS55125592A true JPS55125592A (en) 1980-09-27

Family

ID=12331806

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3145879A Pending JPS55125592A (en) 1979-03-16 1979-03-16 Memory access system

Country Status (1)

Country Link
JP (1) JPS55125592A (en)

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